Software APIs
usbdev_suspend.h
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 #ifndef OPENTITAN_SW_DEVICE_TESTS_USBDEV_SUSPEND_H_
6 #define OPENTITAN_SW_DEVICE_TESTS_USBDEV_SUSPEND_H_
7 #include <stdbool.h>
8 #include <stdint.h>
9 
10 // USB suspend/resume test
11 //
12 // The testing of suspend, sleep, wakeup and resume logic can consume a _lot_
13 // of simulation time because the timings of the USB protocol are very
14 // conservative, eg. Resume Signaling should occur for at least 20ms and Reset
15 // Signaling should be at least 10ms. These durations are impractical for
16 // chip simulation, so the DPI model intentionally shortens these delays.
17 //
18 // Additionally, to exercise both Normal and Deep Sleep modes and the three
19 // different reasons for waking from each sleep, the total number of test
20 // phases/states is prohibitive for a single simulation. Individual top-level
21 // tests therefore specify a range of test phases, and it is expected that the
22 // full sequence shall only ever be exercised on FPGA with a physical host.
23 
24 // Iteration count that denotes looping indefinitely
25 #define USBDEV_SUSPEND_ETERNAL 0U
26 
27 /**
28  * Test phases; named according to the event that we are expecting to occur.
29  */
30 typedef enum {
31  /**
32  * First test phase just tests regular Suspend/Resume signaling; after we've
33  * resumed, we expect a Bus Reset from the DPI/Host.
34  */
35  kSuspendPhaseSuspend = 0u,
36  /**
37  * This test phase instructs the DPI model to put the DUT into Suspend long
38  * enough that this software will attempt to put the device into its Normal
39  * Sleep state and exercise the AON/Wakeup module, stopping the clocks but not
40  * powering down.
41  */
42  kSuspendPhaseSleepResume,
43  /*
44  * The AON/Wakeup module will cause us to awaken in response to a bus reset.
45  */
46  kSuspendPhaseSleepReset,
47  /**
48  * As above, but this time we're expecting a VBUS/SENSE loss.
49  */
50  kSuspendPhaseSleepDisconnect,
51  /**
52  * Mirrors Resume detection for normal sleep, but this time we enter Deep
53  * Sleep and the power is removed too.
54  */
55  kSuspendPhaseDeepResume,
56  /**
57  * Mirrors Bus Reset detection for normal sleep, but this time we enter Deep
58  * Sleep and the power is removed too.
59  */
60  kSuspendPhaseDeepReset,
61  /**
62  * As above, but this time we're expecting a VBUS/SENSE loss.
63  */
64  kSuspendPhaseDeepDisconnect,
65  /**
66  * Final phase; shut down.
67  */
68  kSuspendPhaseShutdown,
69 } usbdev_suspend_phase_t;
70 
71 /**
72  * USB Suspend/Sleep/Wakeup/Resume test body.
73  *
74  * @param init_phase Initial phase of test (inclusive).
75  * @param fin_phase Final phase of test (inclusive).
76  * @param num_iters Number of iterations of the phase sequence. (0 = eternal)
77  * @param with_traffic Perform streaming throughout test.
78  * @param return Successful completion of test.
79  */
80 bool usbdev_suspend_test(usbdev_suspend_phase_t init_phase,
81  usbdev_suspend_phase_t fin_phase, uint32_t num_iters,
82  bool with_traffic);
83 
84 #endif // OPENTITAN_SW_DEVICE_TESTS_USBDEV_SUSPEND_H_