Software APIs
sram_ctrl_testutils.h
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_SRAM_CTRL_TESTUTILS_H_
6#define OPENTITAN_SW_DEVICE_LIB_TESTING_SRAM_CTRL_TESTUTILS_H_
7
8#include <stdbool.h>
9#include <stdint.h>
10
11#include "sw/device/lib/base/status.h"
13
14/**
15 * A typed representation of the test data.
16 */
18 const uint32_t *words;
19 size_t len;
20} sram_ctrl_testutils_data_t;
21
22/**
23 * Writes `data` at the `address` in RAM.
24 */
25void sram_ctrl_testutils_write(uintptr_t address,
26 const sram_ctrl_testutils_data_t data);
27
28/**
29 * Triggers the SRAM scrambling operation.
30 *
31 * SRAM Controller scrambling status is polled continuously. If the operation
32 * has not finished in approximately 850 cycles, a timeout assertion occurs.
33 * The SRAM documentation stated that the scrambling operation takes around
34 * 800 cycles, so another 50 are added just to be on a safe side.
35 *
36 * @return The result of the operation.
37 */
39status_t sram_ctrl_testutils_scramble(const dif_sram_ctrl_t *sram_ctrl);
40
41/**
42 * Triggers the SRAM wipe operation and waits for it to finish.
43 *
44 * @return The result of the operation.
45 */
47status_t sram_ctrl_testutils_wipe(const dif_sram_ctrl_t *sram_ctrl);
48
49#endif // OPENTITAN_SW_DEVICE_LIB_TESTING_SRAM_CTRL_TESTUTILS_H_