sensor_ctrl_regs.h

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/**
 * @file
 * @brief Generated register defines for sensor_ctrl
 */
 
// Copyright information found in source file:
// Copyright lowRISC contributors (OpenTitan project).
 
// Licensing information found in source file:
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
 
#ifndef _SENSOR_CTRL_REG_DEFS_
#define _SENSOR_CTRL_REG_DEFS_
 
#ifdef __cplusplus
extern "C" {
#endif
// Number of alert events from ast
#define SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS 11
 
// Number of local events
#define SENSOR_CTRL_PARAM_NUM_LOCAL_EVENTS 1
 
// Number of alerts sent from sensor control
#define SENSOR_CTRL_PARAM_NUM_ALERTS 2
 
// Number of IO rails
#define SENSOR_CTRL_PARAM_NUM_IO_RAILS 2
 
// Number of pads for which sensor control manages attributes
#define SENSOR_CTRL_PARAM_NUM_ATTR_PADS 4
 
// Register width
#define SENSOR_CTRL_PARAM_REG_WIDTH 32
 
// Common Interrupt Offsets
#define SENSOR_CTRL_INTR_COMMON_IO_STATUS_CHANGE_BIT 0
#define SENSOR_CTRL_INTR_COMMON_INIT_STATUS_CHANGE_BIT 1
 
// Interrupt State Register
#define SENSOR_CTRL_INTR_STATE_REG_OFFSET 0x0
#define SENSOR_CTRL_INTR_STATE_REG_RESVAL 0x0u
#define SENSOR_CTRL_INTR_STATE_IO_STATUS_CHANGE_BIT 0
#define SENSOR_CTRL_INTR_STATE_INIT_STATUS_CHANGE_BIT 1
 
// Interrupt Enable Register
#define SENSOR_CTRL_INTR_ENABLE_REG_OFFSET 0x4
#define SENSOR_CTRL_INTR_ENABLE_REG_RESVAL 0x0u
#define SENSOR_CTRL_INTR_ENABLE_IO_STATUS_CHANGE_BIT 0
#define SENSOR_CTRL_INTR_ENABLE_INIT_STATUS_CHANGE_BIT 1
 
// Interrupt Test Register
#define SENSOR_CTRL_INTR_TEST_REG_OFFSET 0x8
#define SENSOR_CTRL_INTR_TEST_REG_RESVAL 0x0u
#define SENSOR_CTRL_INTR_TEST_IO_STATUS_CHANGE_BIT 0
#define SENSOR_CTRL_INTR_TEST_INIT_STATUS_CHANGE_BIT 1
 
// Alert Test Register
#define SENSOR_CTRL_ALERT_TEST_REG_OFFSET 0xc
#define SENSOR_CTRL_ALERT_TEST_REG_RESVAL 0x0u
#define SENSOR_CTRL_ALERT_TEST_RECOV_ALERT_BIT 0
#define SENSOR_CTRL_ALERT_TEST_FATAL_ALERT_BIT 1
 
// Controls the configurability of !!FATAL_ALERT_EN register.
#define SENSOR_CTRL_CFG_REGWEN_REG_OFFSET 0x10
#define SENSOR_CTRL_CFG_REGWEN_REG_RESVAL 0x1u
#define SENSOR_CTRL_CFG_REGWEN_EN_BIT 0
 
// Alert trigger test (common parameters)
#define SENSOR_CTRL_ALERT_TRIG_VAL_FIELD_WIDTH 1
#define SENSOR_CTRL_ALERT_TRIG_MULTIREG_COUNT 1
 
// Alert trigger test
#define SENSOR_CTRL_ALERT_TRIG_REG_OFFSET 0x14
#define SENSOR_CTRL_ALERT_TRIG_REG_RESVAL 0x0u
#define SENSOR_CTRL_ALERT_TRIG_VAL_0_BIT 0
#define SENSOR_CTRL_ALERT_TRIG_VAL_1_BIT 1
#define SENSOR_CTRL_ALERT_TRIG_VAL_2_BIT 2
#define SENSOR_CTRL_ALERT_TRIG_VAL_3_BIT 3
#define SENSOR_CTRL_ALERT_TRIG_VAL_4_BIT 4
#define SENSOR_CTRL_ALERT_TRIG_VAL_5_BIT 5
#define SENSOR_CTRL_ALERT_TRIG_VAL_6_BIT 6
#define SENSOR_CTRL_ALERT_TRIG_VAL_7_BIT 7
#define SENSOR_CTRL_ALERT_TRIG_VAL_8_BIT 8
#define SENSOR_CTRL_ALERT_TRIG_VAL_9_BIT 9
#define SENSOR_CTRL_ALERT_TRIG_VAL_10_BIT 10
 
// Each multibit value enables a corresponding alert. (common parameters)
#define SENSOR_CTRL_ALERT_EN_VAL_FIELD_WIDTH 4
#define SENSOR_CTRL_ALERT_EN_MULTIREG_COUNT 11
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_0_REG_OFFSET 0x18
#define SENSOR_CTRL_ALERT_EN_0_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_0_VAL_0_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_0_VAL_0_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_0_VAL_0_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_0_VAL_0_MASK, .index = SENSOR_CTRL_ALERT_EN_0_VAL_0_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_1_REG_OFFSET 0x1c
#define SENSOR_CTRL_ALERT_EN_1_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_1_VAL_1_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_1_VAL_1_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_1_VAL_1_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_1_VAL_1_MASK, .index = SENSOR_CTRL_ALERT_EN_1_VAL_1_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_2_REG_OFFSET 0x20
#define SENSOR_CTRL_ALERT_EN_2_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_2_VAL_2_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_2_VAL_2_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_2_VAL_2_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_2_VAL_2_MASK, .index = SENSOR_CTRL_ALERT_EN_2_VAL_2_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_3_REG_OFFSET 0x24
#define SENSOR_CTRL_ALERT_EN_3_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_3_VAL_3_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_3_VAL_3_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_3_VAL_3_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_3_VAL_3_MASK, .index = SENSOR_CTRL_ALERT_EN_3_VAL_3_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_4_REG_OFFSET 0x28
#define SENSOR_CTRL_ALERT_EN_4_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_4_VAL_4_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_4_VAL_4_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_4_VAL_4_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_4_VAL_4_MASK, .index = SENSOR_CTRL_ALERT_EN_4_VAL_4_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_5_REG_OFFSET 0x2c
#define SENSOR_CTRL_ALERT_EN_5_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_5_VAL_5_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_5_VAL_5_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_5_VAL_5_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_5_VAL_5_MASK, .index = SENSOR_CTRL_ALERT_EN_5_VAL_5_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_6_REG_OFFSET 0x30
#define SENSOR_CTRL_ALERT_EN_6_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_6_VAL_6_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_6_VAL_6_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_6_VAL_6_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_6_VAL_6_MASK, .index = SENSOR_CTRL_ALERT_EN_6_VAL_6_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_7_REG_OFFSET 0x34
#define SENSOR_CTRL_ALERT_EN_7_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_7_VAL_7_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_7_VAL_7_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_7_VAL_7_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_7_VAL_7_MASK, .index = SENSOR_CTRL_ALERT_EN_7_VAL_7_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_8_REG_OFFSET 0x38
#define SENSOR_CTRL_ALERT_EN_8_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_8_VAL_8_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_8_VAL_8_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_8_VAL_8_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_8_VAL_8_MASK, .index = SENSOR_CTRL_ALERT_EN_8_VAL_8_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_9_REG_OFFSET 0x3c
#define SENSOR_CTRL_ALERT_EN_9_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_9_VAL_9_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_9_VAL_9_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_9_VAL_9_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_9_VAL_9_MASK, .index = SENSOR_CTRL_ALERT_EN_9_VAL_9_OFFSET })
 
// Each multibit value enables a corresponding alert.
#define SENSOR_CTRL_ALERT_EN_10_REG_OFFSET 0x40
#define SENSOR_CTRL_ALERT_EN_10_REG_RESVAL 0x6u
#define SENSOR_CTRL_ALERT_EN_10_VAL_10_MASK 0xfu
#define SENSOR_CTRL_ALERT_EN_10_VAL_10_OFFSET 0
#define SENSOR_CTRL_ALERT_EN_10_VAL_10_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_ALERT_EN_10_VAL_10_MASK, .index = SENSOR_CTRL_ALERT_EN_10_VAL_10_OFFSET })
 
// Each bit marks a corresponding alert as fatal or recoverable.
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_FIELD_WIDTH 1
#define SENSOR_CTRL_FATAL_ALERT_EN_MULTIREG_COUNT 1
 
// Each bit marks a corresponding alert as fatal or recoverable.
#define SENSOR_CTRL_FATAL_ALERT_EN_REG_OFFSET 0x44
#define SENSOR_CTRL_FATAL_ALERT_EN_REG_RESVAL 0x0u
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_0_BIT 0
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_1_BIT 1
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_2_BIT 2
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_3_BIT 3
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_4_BIT 4
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_5_BIT 5
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_6_BIT 6
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_7_BIT 7
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_8_BIT 8
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_9_BIT 9
#define SENSOR_CTRL_FATAL_ALERT_EN_VAL_10_BIT 10
 
// Each bit represents a recoverable alert that has been triggered by AST.
#define SENSOR_CTRL_RECOV_ALERT_VAL_FIELD_WIDTH 1
#define SENSOR_CTRL_RECOV_ALERT_MULTIREG_COUNT 1
 
// Each bit represents a recoverable alert that has been triggered by AST.
#define SENSOR_CTRL_RECOV_ALERT_REG_OFFSET 0x48
#define SENSOR_CTRL_RECOV_ALERT_REG_RESVAL 0x0u
#define SENSOR_CTRL_RECOV_ALERT_VAL_0_BIT 0
#define SENSOR_CTRL_RECOV_ALERT_VAL_1_BIT 1
#define SENSOR_CTRL_RECOV_ALERT_VAL_2_BIT 2
#define SENSOR_CTRL_RECOV_ALERT_VAL_3_BIT 3
#define SENSOR_CTRL_RECOV_ALERT_VAL_4_BIT 4
#define SENSOR_CTRL_RECOV_ALERT_VAL_5_BIT 5
#define SENSOR_CTRL_RECOV_ALERT_VAL_6_BIT 6
#define SENSOR_CTRL_RECOV_ALERT_VAL_7_BIT 7
#define SENSOR_CTRL_RECOV_ALERT_VAL_8_BIT 8
#define SENSOR_CTRL_RECOV_ALERT_VAL_9_BIT 9
#define SENSOR_CTRL_RECOV_ALERT_VAL_10_BIT 10
 
// Each bit represents a fatal alert that has been triggered by AST.
#define SENSOR_CTRL_FATAL_ALERT_VAL_FIELD_WIDTH 1
#define SENSOR_CTRL_FATAL_ALERT_MULTIREG_COUNT 1
 
// Each bit represents a fatal alert that has been triggered by AST.
#define SENSOR_CTRL_FATAL_ALERT_REG_OFFSET 0x4c
#define SENSOR_CTRL_FATAL_ALERT_REG_RESVAL 0x0u
#define SENSOR_CTRL_FATAL_ALERT_VAL_0_BIT 0
#define SENSOR_CTRL_FATAL_ALERT_VAL_1_BIT 1
#define SENSOR_CTRL_FATAL_ALERT_VAL_2_BIT 2
#define SENSOR_CTRL_FATAL_ALERT_VAL_3_BIT 3
#define SENSOR_CTRL_FATAL_ALERT_VAL_4_BIT 4
#define SENSOR_CTRL_FATAL_ALERT_VAL_5_BIT 5
#define SENSOR_CTRL_FATAL_ALERT_VAL_6_BIT 6
#define SENSOR_CTRL_FATAL_ALERT_VAL_7_BIT 7
#define SENSOR_CTRL_FATAL_ALERT_VAL_8_BIT 8
#define SENSOR_CTRL_FATAL_ALERT_VAL_9_BIT 9
#define SENSOR_CTRL_FATAL_ALERT_VAL_10_BIT 10
#define SENSOR_CTRL_FATAL_ALERT_VAL_11_BIT 11
 
// Status readback for ast
#define SENSOR_CTRL_STATUS_REG_OFFSET 0x50
#define SENSOR_CTRL_STATUS_REG_RESVAL 0x0u
#define SENSOR_CTRL_STATUS_AST_INIT_DONE_BIT 0
#define SENSOR_CTRL_STATUS_IO_POK_MASK 0x3u
#define SENSOR_CTRL_STATUS_IO_POK_OFFSET 1
#define SENSOR_CTRL_STATUS_IO_POK_FIELD \
  ((bitfield_field32_t) { .mask = SENSOR_CTRL_STATUS_IO_POK_MASK, .index = SENSOR_CTRL_STATUS_IO_POK_OFFSET })
 
// Register write enable for attributes of manual pads (common parameters)
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_EN_FIELD_WIDTH 1
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_MULTIREG_COUNT 4
 
// Register write enable for attributes of manual pads
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_0_REG_OFFSET 0x54
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_0_REG_RESVAL 0x1u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_0_EN_0_BIT 0
 
// Register write enable for attributes of manual pads
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_1_REG_OFFSET 0x58
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_1_REG_RESVAL 0x1u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_1_EN_1_BIT 0
 
// Register write enable for attributes of manual pads
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_2_REG_OFFSET 0x5c
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_2_REG_RESVAL 0x1u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_2_EN_2_BIT 0
 
// Register write enable for attributes of manual pads
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_3_REG_OFFSET 0x60
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_3_REG_RESVAL 0x1u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_REGWEN_3_EN_3_BIT 0
 
// Attributes of manual pads.
#define SENSOR_CTRL_MANUAL_PAD_ATTR_PULL_EN_FIELD_WIDTH 1
#define SENSOR_CTRL_MANUAL_PAD_ATTR_PULL_SELECT_FIELD_WIDTH 1
#define SENSOR_CTRL_MANUAL_PAD_ATTR_INPUT_DISABLE_FIELD_WIDTH 1
#define SENSOR_CTRL_MANUAL_PAD_ATTR_MULTIREG_COUNT 4
 
// Attributes of manual pads.
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_REG_OFFSET 0x64
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_REG_RESVAL 0x0u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_PULL_EN_0_BIT 2
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_PULL_SELECT_0_BIT 3
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_PULL_SELECT_0_VALUE_PULL_DOWN 0x0
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_PULL_SELECT_0_VALUE_PULL_UP 0x1
#define SENSOR_CTRL_MANUAL_PAD_ATTR_0_INPUT_DISABLE_0_BIT 7
 
// Attributes of manual pads.
#define SENSOR_CTRL_MANUAL_PAD_ATTR_1_REG_OFFSET 0x68
#define SENSOR_CTRL_MANUAL_PAD_ATTR_1_REG_RESVAL 0x0u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_1_PULL_EN_1_BIT 2
#define SENSOR_CTRL_MANUAL_PAD_ATTR_1_PULL_SELECT_1_BIT 3
#define SENSOR_CTRL_MANUAL_PAD_ATTR_1_INPUT_DISABLE_1_BIT 7
 
// Attributes of manual pads.
#define SENSOR_CTRL_MANUAL_PAD_ATTR_2_REG_OFFSET 0x6c
#define SENSOR_CTRL_MANUAL_PAD_ATTR_2_REG_RESVAL 0x0u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_2_PULL_EN_2_BIT 2
#define SENSOR_CTRL_MANUAL_PAD_ATTR_2_PULL_SELECT_2_BIT 3
#define SENSOR_CTRL_MANUAL_PAD_ATTR_2_INPUT_DISABLE_2_BIT 7
 
// Attributes of manual pads.
#define SENSOR_CTRL_MANUAL_PAD_ATTR_3_REG_OFFSET 0x70
#define SENSOR_CTRL_MANUAL_PAD_ATTR_3_REG_RESVAL 0x0u
#define SENSOR_CTRL_MANUAL_PAD_ATTR_3_PULL_EN_3_BIT 2
#define SENSOR_CTRL_MANUAL_PAD_ATTR_3_PULL_SELECT_3_BIT 3
#define SENSOR_CTRL_MANUAL_PAD_ATTR_3_INPUT_DISABLE_3_BIT 7
 
#ifdef __cplusplus
}  // extern "C"
#endif
#endif  // _SENSOR_CTRL_REG_DEFS_
// End generated register defines for sensor_ctrl