rram_macro_regs.h

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/**
 * @file
 * @brief Generated register defines for rram_macro
 */
 
// Copyright information found in source file:
// Copyright lowRISC contributors (OpenTitan project).
 
// Licensing information found in source file:
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
 
#ifndef _RRAM_MACRO_REG_DEFS_
#define _RRAM_MACRO_REG_DEFS_
 
#ifdef __cplusplus
extern "C" {
#endif
// Register width
#define RRAM_MACRO_PARAM_REG_WIDTH 32
 
 
#define RRAM_MACRO_CSR0_REGWEN_REG_OFFSET 0x0
#define RRAM_MACRO_CSR0_REGWEN_REG_RESVAL 0x1u
#define RRAM_MACRO_CSR0_REGWEN_FIELD0_BIT 0
 
 
#define RRAM_MACRO_CSR1_REG_OFFSET 0x4
#define RRAM_MACRO_CSR1_REG_RESVAL 0x0u
#define RRAM_MACRO_CSR1_FIELD0_MASK 0xffu
#define RRAM_MACRO_CSR1_FIELD0_OFFSET 0
#define RRAM_MACRO_CSR1_FIELD0_FIELD \
  ((bitfield_field32_t) { .mask = RRAM_MACRO_CSR1_FIELD0_MASK, .index = RRAM_MACRO_CSR1_FIELD0_OFFSET })
#define RRAM_MACRO_CSR1_FIELD1_MASK 0x1fu
#define RRAM_MACRO_CSR1_FIELD1_OFFSET 8
#define RRAM_MACRO_CSR1_FIELD1_FIELD \
  ((bitfield_field32_t) { .mask = RRAM_MACRO_CSR1_FIELD1_MASK, .index = RRAM_MACRO_CSR1_FIELD1_OFFSET })
 
 
#define RRAM_MACRO_CSR2_REG_OFFSET 0x8
#define RRAM_MACRO_CSR2_REG_RESVAL 0x0u
#define RRAM_MACRO_CSR2_FIELD0_BIT 0
#define RRAM_MACRO_CSR2_FIELD1_BIT 1
#define RRAM_MACRO_CSR2_FIELD2_BIT 2
#define RRAM_MACRO_CSR2_FIELD3_BIT 3
#define RRAM_MACRO_CSR2_FIELD4_BIT 4
#define RRAM_MACRO_CSR2_FIELD5_BIT 5
#define RRAM_MACRO_CSR2_FIELD6_BIT 6
#define RRAM_MACRO_CSR2_FIELD7_BIT 7
 
#ifdef __cplusplus
}  // extern "C"
#endif
#endif  // _RRAM_MACRO_REG_DEFS_
// End generated register defines for rram_macro