rram_macro.h

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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Device table API auto-generated by `dtgen`
 
#ifndef OPENTITAN_DT_RRAM_MACRO_H_
#define OPENTITAN_DT_RRAM_MACRO_H_
 
#ifdef __cplusplus
extern "C" {
#endif  // __cplusplus
 
/**
 * @file
 * @brief Device Tables (DT) for IP rram_macro and top earlgrey.
 *
 * This file contains the type definitions and global functions of the rram_macro.
 */
 
#include "hw/top/dt/api.h"
#include <stdint.h>
 
 
 
/**
 * List of instances.
 */
typedef enum dt_rram_macro {
  kDtRramMacroFirst = 0, /**< First instance */
  kDtRramMacro = 0, /**< rram_macro */
} dt_rram_macro_t;
 
enum {
  kDtRramMacroCount = 1, /**< Number of instances */
};
 
 
/**
 * List of register blocks.
 *
 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_rram_macro_reg_block {
  kDtRramMacroRegBlockPrim = 0, /**<  */
} dt_rram_macro_reg_block_t;
 
enum {
  kDtRramMacroRegBlockCount = 1, /**< Number of register blocks */
};
 
 
/** Primary register block (associated with the "primary" set of registers that control the IP). */
static const dt_rram_macro_reg_block_t kDtRramMacroRegBlockPrimary = kDtRramMacroRegBlockPrim;
 
/**
 * List of clock ports.
 *
 * Clock ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_rram_macro_clock {
  kDtRramMacroClockClk = 0, /**< Clock port clk_i */
} dt_rram_macro_clock_t;
 
enum {
  kDtRramMacroClockCount = 1, /**< Number of clock ports */
};
 
 
/**
 * List of reset ports.
 *
 * Reset ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_rram_macro_reset {
  kDtRramMacroResetRst = 0, /**< Reset port rst_ni */
} dt_rram_macro_reset_t;
 
enum {
  kDtRramMacroResetCount = 1, /**< Number of reset ports */
};
 
 
/**
 * List of peripheral I/O.
 *
 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_rram_macro_periph_io {
  kDtRramMacroPeriphIoTck = 0, /**<  */
  kDtRramMacroPeriphIoTms = 1, /**<  */
  kDtRramMacroPeriphIoTdi = 2, /**<  */
  kDtRramMacroPeriphIoTdo = 3, /**<  */
} dt_rram_macro_periph_io_t;
 
enum {
  kDtRramMacroPeriphIoCount = 4, /**< Number of peripheral I/O */
};
 
 
 
/**
 * Get the rram_macro instance from an instance ID
 *
 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
 *
 * @param inst_id Instance ID.
 * @return A rram_macro instance.
 *
 * **Note:** This function only makes sense if the instance ID has device type rram_macro,
 * otherwise the returned value is unspecified.
 */
dt_rram_macro_t dt_rram_macro_from_instance_id(dt_instance_id_t inst_id);
 
/**
 * Get the instance ID of an instance.
 *
 * @param dt Instance of rram_macro.
 * @return The instance ID of that instance.
 */
dt_instance_id_t dt_rram_macro_instance_id(dt_rram_macro_t dt);
 
/**
 * Get the register base address of an instance.
 *
 * @param dt Instance of rram_macro.
 * @param reg_block The register block requested.
 * @return The register base address of the requested block.
 */
uint32_t dt_rram_macro_reg_block(
    dt_rram_macro_t dt,
    dt_rram_macro_reg_block_t reg_block);
 
/**
 * Get the primary register base address of an instance.
 *
 * This is just a convenience function, equivalent to
 * `dt_rram_macro_reg_block(dt, kDtRramMacroRegBlockPrim)`
 *
 * @param dt Instance of rram_macro.
 * @return The register base address of the primary register block.
 */
static inline uint32_t dt_rram_macro_primary_reg_block(
    dt_rram_macro_t dt) {
  return dt_rram_macro_reg_block(dt, kDtRramMacroRegBlockPrim);
}
 
 
 
/**
 * Get the peripheral I/O description of an instance.
 *
 * @param dt Instance of rram_macro.
 * @param sig Requested peripheral I/O.
 * @return Description of the requested peripheral I/O for this instance.
 */
dt_periph_io_t dt_rram_macro_periph_io(
    dt_rram_macro_t dt,
    dt_rram_macro_periph_io_t sig);
 
/**
 * Get the clock signal connected to a clock port of an instance.
 *
 * @param dt Instance of rram_macro.
 * @param clk Clock port.
 * @return Clock signal.
 */
dt_clock_t dt_rram_macro_clock(
    dt_rram_macro_t dt,
    dt_rram_macro_clock_t clk);
 
/**
 * Get the reset signal connected to a reset port of an instance.
 *
 * @param dt Instance of rram_macro.
 * @param rst Reset port.
 * @return Reset signal.
 */
dt_reset_t dt_rram_macro_reset(
    dt_rram_macro_t dt,
    dt_rram_macro_reset_t rst);
 
 
 
#ifdef __cplusplus
}  // extern "C"
#endif  // __cplusplus
 
#endif  // OPENTITAN_DT_RRAM_MACRO_H_