rram_macro.c

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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Device table API auto-generated by `dtgen`
 
/**
 * @file
 * @brief Device Tables (DT) for IP rram_macro and top earlgrey.
 */
 
#include "hw/top/dt/rram_macro.h"
 
 
 
/**
 * Description of instances.
 */
typedef struct dt_desc_rram_macro {
  dt_instance_id_t inst_id; /**< Instance ID */
  uint32_t reg_addr[kDtRramMacroRegBlockCount]; /**< Base address of each register block */
  dt_clock_t clock[kDtRramMacroClockCount]; /**< Clock signal connected to each clock port */
  dt_reset_t reset[kDtRramMacroResetCount]; /**< Reset signal connected to each reset port */
  dt_periph_io_t periph_io[kDtRramMacroPeriphIoCount]; /**< Description of each peripheral I/O */
} dt_desc_rram_macro_t;
 
 
 
 
static const dt_desc_rram_macro_t rram_macro_desc[kDtRramMacroCount] = {
  [kDtRramMacro] = {
    .inst_id = kDtInstanceIdRramMacro,
    .reg_addr = {
      [kDtRramMacroRegBlockPrim] = 0x41018000,
    },
    .clock = {
      [kDtRramMacroClockClk] = kDtClockMain,
    },
    .reset = {
      [kDtRramMacroResetRst] = kDtResetLc,
    },
    .periph_io = {
      [kDtRramMacroPeriphIoTck] = {
        .__internal = {
          .type = kDtPeriphIoTypeMio,
          .dir = kDtPeriphIoDirIn,
          .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInRramMacroTck,
          .outsel_or_dt_pad = 0,
        },
      },
      [kDtRramMacroPeriphIoTms] = {
        .__internal = {
          .type = kDtPeriphIoTypeMio,
          .dir = kDtPeriphIoDirIn,
          .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInRramMacroTms,
          .outsel_or_dt_pad = 0,
        },
      },
      [kDtRramMacroPeriphIoTdi] = {
        .__internal = {
          .type = kDtPeriphIoTypeMio,
          .dir = kDtPeriphIoDirIn,
          .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInRramMacroTdi,
          .outsel_or_dt_pad = 0,
        },
      },
      [kDtRramMacroPeriphIoTdo] = {
        .__internal = {
          .type = kDtPeriphIoTypeMio,
          .dir = kDtPeriphIoDirOut,
          .periph_input_or_direct_pad = 0,
          .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselRramMacroTdo,
        },
      },
    },
  },
};
 
/**
 * Return a pointer to the `dt_rram_macro_desc_t` structure of the requested
 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
 * the function) with the provided default value.
 */
#define TRY_GET_DT(dt, default)   ({     if ((dt) < (dt_rram_macro_t)0 || (int)(dt) >= kDtRramMacroCount)       return (default);     &rram_macro_desc[dt];   })
 
dt_rram_macro_t dt_rram_macro_from_instance_id(dt_instance_id_t inst_id) {
  if (inst_id >= kDtInstanceIdRramMacro && inst_id <= kDtInstanceIdRramMacro) {
    return (dt_rram_macro_t)(inst_id - kDtInstanceIdRramMacro);
  }
  return (dt_rram_macro_t)0;
}
 
dt_instance_id_t dt_rram_macro_instance_id(
    dt_rram_macro_t dt) {
  return TRY_GET_DT(dt, kDtInstanceIdUnknown)->inst_id;
}
 
uint32_t dt_rram_macro_reg_block(
    dt_rram_macro_t dt,
    dt_rram_macro_reg_block_t reg_block) {
  // Return a recognizable address in case of wrong argument.
  return TRY_GET_DT(dt, 0xdeadbeef)->reg_addr[reg_block];
}
 
 
 
dt_periph_io_t dt_rram_macro_periph_io(
    dt_rram_macro_t dt,
    dt_rram_macro_periph_io_t sig) {
  // Return a harmless value in case of wrong argument.
  return TRY_GET_DT(dt, kDtPeriphIoConstantHighZ)->periph_io[sig];
}
 
dt_clock_t dt_rram_macro_clock(
    dt_rram_macro_t dt,
    dt_rram_macro_clock_t clk) {
  // Return the first clock in case of invalid argument.
  return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
}
 
dt_reset_t dt_rram_macro_reset(
    dt_rram_macro_t dt,
    dt_rram_macro_reset_t rst) {
  const dt_rram_macro_reset_t count = kDtRramMacroResetCount;
  if (rst >= count) {
    return kDtResetUnknown;
  }
  return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
}