Software APIs
pwm.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_PWM_H_
8#define OPENTITAN_DT_PWM_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP pwm and top earlgrey.
17 *
18 * This file contains the type definitions and global functions of the pwm.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26
27
28/**
29 * List of instances.
30 */
31typedef enum dt_pwm {
32 kDtPwmFirst = 0, /**< First instance */
33 kDtPwmAon = 0, /**< pwm_aon */
35
36enum {
37 kDtPwmCount = 1, /**< Number of instances */
38};
39
40
41/**
42 * List of register blocks.
43 *
44 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
45 */
46typedef enum dt_pwm_reg_block {
47 kDtPwmRegBlockCore = 0, /**< */
49
50enum {
51 kDtPwmRegBlockCount = 1, /**< Number of register blocks */
52};
53
54
55/** Primary register block (associated with the "primary" set of registers that control the IP). */
56static const dt_pwm_reg_block_t kDtPwmRegBlockPrimary = kDtPwmRegBlockCore;
57
58/**
59 * List of Alerts.
60 *
61 * Alerts are guaranteed to be numbered consecutively from 0.
62 */
63typedef enum dt_pwm_alert {
64 kDtPwmAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
66
67enum {
68 kDtPwmAlertCount = 1, /**< Number of Alerts */
69};
70
71
72/**
73 * List of clock ports.
74 *
75 * Clock ports are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_pwm_clock {
78 kDtPwmClockClk = 0, /**< Clock port clk_i */
79 kDtPwmClockCore = 1, /**< Clock port clk_core_i */
81
82enum {
83 kDtPwmClockCount = 2, /**< Number of clock ports */
84};
85
86
87/**
88 * List of reset ports.
89 *
90 * Reset ports are guaranteed to be numbered consecutively from 0.
91 */
92typedef enum dt_pwm_reset {
93 kDtPwmResetRst = 0, /**< Reset port rst_ni */
94 kDtPwmResetCore = 1, /**< Reset port rst_core_ni */
96
97enum {
98 kDtPwmResetCount = 2, /**< Number of reset ports */
99};
100
101
102/**
103 * List of peripheral I/O.
104 *
105 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
106 */
107typedef enum dt_pwm_periph_io {
108 kDtPwmPeriphIoPwm0 = 0, /**< */
109 kDtPwmPeriphIoPwm1 = 1, /**< */
110 kDtPwmPeriphIoPwm2 = 2, /**< */
111 kDtPwmPeriphIoPwm3 = 3, /**< */
112 kDtPwmPeriphIoPwm4 = 4, /**< */
113 kDtPwmPeriphIoPwm5 = 5, /**< */
115
116enum {
117 kDtPwmPeriphIoCount = 6, /**< Number of peripheral I/O */
118};
119
120
121/**
122 * List of supported hardware features.
123 */
124#define OPENTITAN_PWM_HAS_DUTYCYCLE 1
125#define OPENTITAN_PWM_HAS_BLINK 1
126#define OPENTITAN_PWM_HAS_HEARTBEAT 1
127#define OPENTITAN_PWM_HAS_POLARITY 1
128#define OPENTITAN_PWM_HAS_CLOCKDIVIDER 1
129#define OPENTITAN_PWM_HAS_PHASEDELAY 1
130
131
132
133/**
134 * Get the pwm instance from an instance ID
135 *
136 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
137 *
138 * @param inst_id Instance ID.
139 * @return A pwm instance.
140 *
141 * **Note:** This function only makes sense if the instance ID has device type pwm,
142 * otherwise the returned value is unspecified.
143 */
145
146/**
147 * Get the instance ID of an instance.
148 *
149 * @param dt Instance of pwm.
150 * @return The instance ID of that instance.
151 */
153
154/**
155 * Get the register base address of an instance.
156 *
157 * @param dt Instance of pwm.
158 * @param reg_block The register block requested.
159 * @return The register base address of the requested block.
160 */
161uint32_t dt_pwm_reg_block(
162 dt_pwm_t dt,
163 dt_pwm_reg_block_t reg_block);
164
165/**
166 * Get the primary register base address of an instance.
167 *
168 * This is just a convenience function, equivalent to
169 * `dt_pwm_reg_block(dt, kDtPwmRegBlockCore)`
170 *
171 * @param dt Instance of pwm.
172 * @return The register base address of the primary register block.
173 */
174static inline uint32_t dt_pwm_primary_reg_block(
175 dt_pwm_t dt) {
176 return dt_pwm_reg_block(dt, kDtPwmRegBlockCore);
177}
178
179
180/**
181 * Get the alert ID of a pwm alert for a given instance.
182 *
183 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
184 * instances where the instance is not connected, the return value is unspecified.
185 *
186 * @param dt Instance of pwm.
187 * @param alert A pwm alert.
188 * @return The Alert Handler alert ID of the alert of this instance.
189 */
191 dt_pwm_t dt,
192 dt_pwm_alert_t alert);
193
194/**
195 * Convert a global alert ID to a local pwm alert type.
196 *
197 * @param dt Instance of pwm.
198 * @param alert A global alert ID that belongs to this instance.
199 * @return The pwm alert, or `kDtPwmAlertCount`.
200 *
201 * **Note:** This function assumes that the global alert ID belongs to the
202 * instance of pwm passed in parameter. In other words, it must be the case
203 * that `dt_pwm_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
204 * this function will return `kDtPwmAlertCount`.
205 */
207 dt_pwm_t dt,
208 dt_alert_id_t alert);
209
210
211/**
212 * Get the peripheral I/O description of an instance.
213 *
214 * @param dt Instance of pwm.
215 * @param sig Requested peripheral I/O.
216 * @return Description of the requested peripheral I/O for this instance.
217 */
219 dt_pwm_t dt,
221
222/**
223 * Get the clock signal connected to a clock port of an instance.
224 *
225 * @param dt Instance of pwm.
226 * @param clk Clock port.
227 * @return Clock signal.
228 */
230 dt_pwm_t dt,
231 dt_pwm_clock_t clk);
232
233/**
234 * Get the reset signal connected to a reset port of an instance.
235 *
236 * @param dt Instance of pwm.
237 * @param rst Reset port.
238 * @return Reset signal.
239 */
241 dt_pwm_t dt,
242 dt_pwm_reset_t rst);
243
244
245
246/**
247 * Get the Number of output channels.
248 *
249 * @param dt Instance of pwm.
250 * @return Number of output channels.
251 */
253
254
255
256#ifdef __cplusplus
257} // extern "C"
258#endif // __cplusplus
259
260#endif // OPENTITAN_DT_PWM_H_