5 #ifndef OPENTITAN_SW_DEVICE_LIB_BASE_MMIO_H_
6 #define OPENTITAN_SW_DEVICE_LIB_BASE_MMIO_H_
43 #define MMIO_DEPRECATED
45 #ifdef OT_PLATFORM_RV32
63 .base = (
volatile void *)address,
79 inline uint8_t mmio_region_read8(
mmio_region_t base, ptrdiff_t offset) {
80 return ((
volatile uint8_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint8_t)];
95 inline uint32_t mmio_region_read32(
mmio_region_t base, ptrdiff_t offset) {
97 (
volatile uint32_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint32_t)];
111 inline void mmio_region_write8(
mmio_region_t base, ptrdiff_t offset,
113 ((
volatile uint8_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint8_t)] =
128 inline void mmio_region_write8_shadowed(
mmio_region_t base, ptrdiff_t offset,
130 ((
volatile uint8_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint8_t)] =
132 ((
volatile uint8_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint8_t)] =
147 inline void mmio_region_write32(
mmio_region_t base, ptrdiff_t offset,
149 ((
volatile uint32_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint32_t)] =
164 inline void mmio_region_write32_shadowed(
mmio_region_t base, ptrdiff_t offset,
166 ((
volatile uint32_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint32_t)] =
168 ((
volatile uint32_t *)base.base)[
OT_UNSIGNED(offset) /
sizeof(uint32_t)] =
190 uint8_t mmio_region_read8(
mmio_region_t base, ptrdiff_t offset);
192 uint32_t mmio_region_read32(
mmio_region_t base, ptrdiff_t offset);
194 void mmio_region_write8(
mmio_region_t base, ptrdiff_t offset, uint8_t value);
195 void mmio_region_write32(
mmio_region_t base, ptrdiff_t offset, uint32_t value);
196 void mmio_region_write8_shadowed(
mmio_region_t base, ptrdiff_t offset,
198 void mmio_region_write32_shadowed(
mmio_region_t base, ptrdiff_t offset,
217 uint32_t mask, uint32_t mask_index) {
219 mmio_region_read32(base, offset),
238 uint32_t bit_index) {
255 ptrdiff_t offset, uint32_t mask,
256 uint32_t mask_index) {
257 uint32_t register_value = mmio_region_read32(base, offset);
261 mmio_region_write32(base, offset, register_value);
277 ptrdiff_t offset, uint32_t mask,
278 uint32_t mask_index) {
279 uint32_t register_value = mmio_region_read32(base, offset);
283 mmio_region_write32(base, offset, register_value);
299 ptrdiff_t offset, uint32_t mask,
300 uint32_t mask_index) {
301 uint32_t register_value = 0x0u;
305 mmio_region_write32(base, offset, register_value);
327 uint32_t register_value = mmio_region_read32(base, offset);
329 mmio_region_write32(base, offset, register_value);
348 uint32_t register_value = 0x0u;
350 mmio_region_write32(base, offset, register_value);
366 uint32_t bit_index) {
367 uint32_t register_value = mmio_region_read32(base, offset);
369 mmio_region_write32(base, offset, register_value);
384 uint32_t bit_index) {
385 uint32_t register_value = mmio_region_read32(base, offset);
387 mmio_region_write32(base, offset, register_value);
405 uint32_t bit_index) {
406 uint32_t register_value = 0x0u;
408 mmio_region_write32(base, offset, register_value);
424 void *dest,
size_t len);
439 const void *src,
size_t len);