Software APIs
i3c.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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#ifndef OPENTITAN_DT_I3C_H_
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#define OPENTITAN_DT_I3C_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
// __cplusplus
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/**
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* @file
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* @brief Device Tables (DT) for IP i3c and top earlgrey.
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*
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* This file contains the type definitions and global functions of the i3c.
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*/
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#include "hw/top/dt/api.h"
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#include <stdint.h>
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/**
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* List of instances.
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*/
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typedef
enum
dt_i3c
{
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kDtI3cFirst
= 0,
/**< First instance */
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kDtI3c0
= 0,
/**< i3c0 */
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kDtI3c1
= 1,
/**< i3c1 */
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}
dt_i3c_t
;
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enum
{
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kDtI3cCount
= 2,
/**< Number of instances */
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};
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/**
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* List of register blocks.
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*
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* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_i3c_reg_block
{
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kDtI3cRegBlockCore = 0,
/**< */
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}
dt_i3c_reg_block_t
;
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enum
{
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kDtI3cRegBlockCount
= 1,
/**< Number of register blocks */
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};
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/** Primary register block (associated with the "primary" set of registers that control the IP). */
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static
const
dt_i3c_reg_block_t
kDtI3cRegBlockPrimary = kDtI3cRegBlockCore;
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/**
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* List of IRQs.
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*
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* IRQs are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_i3c_irq
{
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kDtI3cIrqHci
= 0,
/**< HCI interrupt. */
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kDtI3cIrqTarg
= 1,
/**< Target interrupt. */
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}
dt_i3c_irq_t
;
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enum
{
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kDtI3cIrqCount
= 2,
/**< Number of IRQs */
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};
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/**
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* List of Alerts.
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*
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* Alerts are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_i3c_alert
{
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kDtI3cAlertFatalFault
= 0,
/**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
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}
dt_i3c_alert_t
;
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enum
{
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kDtI3cAlertCount
= 1,
/**< Number of Alerts */
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};
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/**
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* List of clock ports.
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*
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* Clock ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_i3c_clock
{
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kDtI3cClockClk
= 0,
/**< Clock port clk_i */
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kDtI3cClockAon
= 1,
/**< Clock port clk_aon_i */
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}
dt_i3c_clock_t
;
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enum
{
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kDtI3cClockCount
= 2,
/**< Number of clock ports */
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};
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/**
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* List of reset ports.
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*
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* Reset ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_i3c_reset
{
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kDtI3cResetRst
= 0,
/**< Reset port rst_ni */
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kDtI3cResetAon
= 1,
/**< Reset port rst_aon_ni */
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}
dt_i3c_reset_t
;
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enum
{
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kDtI3cResetCount
= 2,
/**< Number of reset ports */
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};
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/**
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* List of peripheral I/O.
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*
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* Peripheral I/O are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_i3c_periph_io
{
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kDtI3cPeriphIoRstdetScl = 0,
/**< */
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kDtI3cPeriphIoRstdetSda = 1,
/**< */
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kDtI3cPeriphIoCtrlSdaPu = 2,
/**< */
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kDtI3cPeriphIoScl = 3,
/**< */
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kDtI3cPeriphIoSda = 4,
/**< */
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}
dt_i3c_periph_io_t
;
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enum
{
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kDtI3cPeriphIoCount
= 5,
/**< Number of peripheral I/O */
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};
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/**
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* List of wakeups.
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*
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* Wakeups are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_i3c_wakeup
{
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kDtI3cWakeupRstdetWkupReq
= 0,
/**< Wake-up request on detection of the Target Reset Pattern (running on AON clock). */
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}
dt_i3c_wakeup_t
;
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enum
{
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kDtI3cWakeupCount
= 1,
/**< Number of wakeups */
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};
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/**
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* Get the i3c instance from an instance ID
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*
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* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
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*
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* @param inst_id Instance ID.
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* @return A i3c instance.
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*
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* **Note:** This function only makes sense if the instance ID has device type i3c,
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* otherwise the returned value is unspecified.
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*/
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dt_i3c_t
dt_i3c_from_instance_id
(
dt_instance_id_t
inst_id);
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/**
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* Get the instance ID of an instance.
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*
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* @param dt Instance of i3c.
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* @return The instance ID of that instance.
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*/
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dt_instance_id_t
dt_i3c_instance_id
(
dt_i3c_t
dt);
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/**
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* Get the register base address of an instance.
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*
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* @param dt Instance of i3c.
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* @param reg_block The register block requested.
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* @return The register base address of the requested block.
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*/
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uint32_t
dt_i3c_reg_block
(
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dt_i3c_t
dt,
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dt_i3c_reg_block_t
reg_block);
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/**
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* Get the primary register base address of an instance.
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*
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* This is just a convenience function, equivalent to
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* `dt_i3c_reg_block(dt, kDtI3cRegBlockCore)`
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*
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* @param dt Instance of i3c.
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* @return The register base address of the primary register block.
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*/
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static
inline
uint32_t dt_i3c_primary_reg_block(
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dt_i3c_t
dt) {
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return
dt_i3c_reg_block
(dt, kDtI3cRegBlockCore);
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}
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/**
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* Get the PLIC ID of a i3c IRQ for a given instance.
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*
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* If the instance is not connected to the PLIC, this function
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* will return `kDtPlicIrqIdNone`.
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*
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* @param dt Instance of i3c.
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* @param irq A i3c IRQ.
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* @return The PLIC ID of the IRQ of this instance.
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*/
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dt_plic_irq_id_t
dt_i3c_irq_to_plic_id
(
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dt_i3c_t
dt,
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dt_i3c_irq_t
irq);
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/**
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* Convert a global IRQ ID to a local i3c IRQ type.
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*
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* @param dt Instance of i3c.
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* @param irq A PLIC ID that belongs to this instance.
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* @return The i3c IRQ, or `kDtI3cIrqCount`.
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*
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* **Note:** This function assumes that the PLIC ID belongs to the instance
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* of i3c passed in parameter. In other words, it must be the case that
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* `dt_i3c_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
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* will return `kDtI3cIrqCount`.
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*/
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dt_i3c_irq_t
dt_i3c_irq_from_plic_id
(
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dt_i3c_t
dt,
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dt_plic_irq_id_t
irq);
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/**
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* Get the alert ID of a i3c alert for a given instance.
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*
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* **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
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* instances where the instance is not connected, the return value is unspecified.
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*
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* @param dt Instance of i3c.
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* @param alert A i3c alert.
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* @return The Alert Handler alert ID of the alert of this instance.
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*/
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dt_alert_id_t
dt_i3c_alert_to_alert_id
(
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dt_i3c_t
dt,
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dt_i3c_alert_t
alert);
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/**
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* Convert a global alert ID to a local i3c alert type.
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*
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* @param dt Instance of i3c.
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* @param alert A global alert ID that belongs to this instance.
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* @return The i3c alert, or `kDtI3cAlertCount`.
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*
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* **Note:** This function assumes that the global alert ID belongs to the
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* instance of i3c passed in parameter. In other words, it must be the case
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* that `dt_i3c_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
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* this function will return `kDtI3cAlertCount`.
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*/
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dt_i3c_alert_t
dt_i3c_alert_from_alert_id
(
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dt_i3c_t
dt,
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dt_alert_id_t
alert);
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/**
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* Get the peripheral I/O description of an instance.
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*
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* @param dt Instance of i3c.
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* @param sig Requested peripheral I/O.
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* @return Description of the requested peripheral I/O for this instance.
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*/
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dt_periph_io_t
dt_i3c_periph_io
(
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dt_i3c_t
dt,
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dt_i3c_periph_io_t
sig);
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/**
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* Get the clock signal connected to a clock port of an instance.
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*
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* @param dt Instance of i3c.
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* @param clk Clock port.
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* @return Clock signal.
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*/
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dt_clock_t
dt_i3c_clock
(
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dt_i3c_t
dt,
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dt_i3c_clock_t
clk);
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/**
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* Get the reset signal connected to a reset port of an instance.
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*
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* @param dt Instance of i3c.
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* @param rst Reset port.
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* @return Reset signal.
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*/
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dt_reset_t
dt_i3c_reset
(
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dt_i3c_t
dt,
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dt_i3c_reset_t
rst);
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#ifdef __cplusplus
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}
// extern "C"
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#endif
// __cplusplus
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#endif
// OPENTITAN_DT_I3C_H_
(earlgrey)
hw
top
dt
i3c.h
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