Software APIs
i3c.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_I3C_H_
8#define OPENTITAN_DT_I3C_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP i3c and top earlgrey.
17 *
18 * This file contains the type definitions and global functions of the i3c.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_i3c {
30 kDtI3cFirst = 0, /**< First instance */
31 kDtI3c0 = 0, /**< i3c0 */
32 kDtI3c1 = 1, /**< i3c1 */
34
35enum {
36 kDtI3cCount = 2, /**< Number of instances */
37};
38
39
40/**
41 * List of register blocks.
42 *
43 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
44 */
45typedef enum dt_i3c_reg_block {
46 kDtI3cRegBlockCore = 0, /**< */
48
49enum {
50 kDtI3cRegBlockCount = 1, /**< Number of register blocks */
51};
52
53
54/** Primary register block (associated with the "primary" set of registers that control the IP). */
55static const dt_i3c_reg_block_t kDtI3cRegBlockPrimary = kDtI3cRegBlockCore;
56
57/**
58 * List of IRQs.
59 *
60 * IRQs are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_i3c_irq {
63 kDtI3cIrqHci = 0, /**< HCI interrupt. */
64 kDtI3cIrqTarg = 1, /**< Target interrupt. */
66
67enum {
68 kDtI3cIrqCount = 2, /**< Number of IRQs */
69};
70
71
72/**
73 * List of Alerts.
74 *
75 * Alerts are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_i3c_alert {
78 kDtI3cAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
80
81enum {
82 kDtI3cAlertCount = 1, /**< Number of Alerts */
83};
84
85
86/**
87 * List of clock ports.
88 *
89 * Clock ports are guaranteed to be numbered consecutively from 0.
90 */
91typedef enum dt_i3c_clock {
92 kDtI3cClockClk = 0, /**< Clock port clk_i */
93 kDtI3cClockAon = 1, /**< Clock port clk_aon_i */
95
96enum {
97 kDtI3cClockCount = 2, /**< Number of clock ports */
98};
99
100
101/**
102 * List of reset ports.
103 *
104 * Reset ports are guaranteed to be numbered consecutively from 0.
105 */
106typedef enum dt_i3c_reset {
107 kDtI3cResetRst = 0, /**< Reset port rst_ni */
108 kDtI3cResetAon = 1, /**< Reset port rst_aon_ni */
110
111enum {
112 kDtI3cResetCount = 2, /**< Number of reset ports */
113};
114
115
116/**
117 * List of peripheral I/O.
118 *
119 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
120 */
121typedef enum dt_i3c_periph_io {
122 kDtI3cPeriphIoRstdetScl = 0, /**< */
123 kDtI3cPeriphIoRstdetSda = 1, /**< */
124 kDtI3cPeriphIoCtrlSdaPu = 2, /**< */
125 kDtI3cPeriphIoScl = 3, /**< */
126 kDtI3cPeriphIoSda = 4, /**< */
128
129enum {
130 kDtI3cPeriphIoCount = 5, /**< Number of peripheral I/O */
131};
132
133
134/**
135 * List of wakeups.
136 *
137 * Wakeups are guaranteed to be numbered consecutively from 0.
138 */
139typedef enum dt_i3c_wakeup {
140 kDtI3cWakeupRstdetWkupReq = 0, /**< Wake-up request on detection of the Target Reset Pattern (running on AON clock). */
142
143enum {
144 kDtI3cWakeupCount = 1, /**< Number of wakeups */
145};
146
147
148
149/**
150 * Get the i3c instance from an instance ID
151 *
152 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
153 *
154 * @param inst_id Instance ID.
155 * @return A i3c instance.
156 *
157 * **Note:** This function only makes sense if the instance ID has device type i3c,
158 * otherwise the returned value is unspecified.
159 */
161
162/**
163 * Get the instance ID of an instance.
164 *
165 * @param dt Instance of i3c.
166 * @return The instance ID of that instance.
167 */
169
170/**
171 * Get the register base address of an instance.
172 *
173 * @param dt Instance of i3c.
174 * @param reg_block The register block requested.
175 * @return The register base address of the requested block.
176 */
177uint32_t dt_i3c_reg_block(
178 dt_i3c_t dt,
179 dt_i3c_reg_block_t reg_block);
180
181/**
182 * Get the primary register base address of an instance.
183 *
184 * This is just a convenience function, equivalent to
185 * `dt_i3c_reg_block(dt, kDtI3cRegBlockCore)`
186 *
187 * @param dt Instance of i3c.
188 * @return The register base address of the primary register block.
189 */
190static inline uint32_t dt_i3c_primary_reg_block(
191 dt_i3c_t dt) {
192 return dt_i3c_reg_block(dt, kDtI3cRegBlockCore);
193}
194
195/**
196 * Get the PLIC ID of a i3c IRQ for a given instance.
197 *
198 * If the instance is not connected to the PLIC, this function
199 * will return `kDtPlicIrqIdNone`.
200 *
201 * @param dt Instance of i3c.
202 * @param irq A i3c IRQ.
203 * @return The PLIC ID of the IRQ of this instance.
204 */
206 dt_i3c_t dt,
207 dt_i3c_irq_t irq);
208
209/**
210 * Convert a global IRQ ID to a local i3c IRQ type.
211 *
212 * @param dt Instance of i3c.
213 * @param irq A PLIC ID that belongs to this instance.
214 * @return The i3c IRQ, or `kDtI3cIrqCount`.
215 *
216 * **Note:** This function assumes that the PLIC ID belongs to the instance
217 * of i3c passed in parameter. In other words, it must be the case that
218 * `dt_i3c_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
219 * will return `kDtI3cIrqCount`.
220 */
222 dt_i3c_t dt,
223 dt_plic_irq_id_t irq);
224
225
226/**
227 * Get the alert ID of a i3c alert for a given instance.
228 *
229 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
230 * instances where the instance is not connected, the return value is unspecified.
231 *
232 * @param dt Instance of i3c.
233 * @param alert A i3c alert.
234 * @return The Alert Handler alert ID of the alert of this instance.
235 */
237 dt_i3c_t dt,
238 dt_i3c_alert_t alert);
239
240/**
241 * Convert a global alert ID to a local i3c alert type.
242 *
243 * @param dt Instance of i3c.
244 * @param alert A global alert ID that belongs to this instance.
245 * @return The i3c alert, or `kDtI3cAlertCount`.
246 *
247 * **Note:** This function assumes that the global alert ID belongs to the
248 * instance of i3c passed in parameter. In other words, it must be the case
249 * that `dt_i3c_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
250 * this function will return `kDtI3cAlertCount`.
251 */
253 dt_i3c_t dt,
254 dt_alert_id_t alert);
255
256
257/**
258 * Get the peripheral I/O description of an instance.
259 *
260 * @param dt Instance of i3c.
261 * @param sig Requested peripheral I/O.
262 * @return Description of the requested peripheral I/O for this instance.
263 */
265 dt_i3c_t dt,
267
268/**
269 * Get the clock signal connected to a clock port of an instance.
270 *
271 * @param dt Instance of i3c.
272 * @param clk Clock port.
273 * @return Clock signal.
274 */
276 dt_i3c_t dt,
277 dt_i3c_clock_t clk);
278
279/**
280 * Get the reset signal connected to a reset port of an instance.
281 *
282 * @param dt Instance of i3c.
283 * @param rst Reset port.
284 * @return Reset signal.
285 */
287 dt_i3c_t dt,
288 dt_i3c_reset_t rst);
289
290
291
292#ifdef __cplusplus
293} // extern "C"
294#endif // __cplusplus
295
296#endif // OPENTITAN_DT_I3C_H_