Software APIs
dt_racl_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RACL_CTRL_H_
8#define OPENTITAN_DT_RACL_CTRL_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP racl_ctrl and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the racl_ctrl.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_racl_ctrl {
30 kDtRaclCtrl = 0, /**< racl_ctrl */
31 kDtRaclCtrlFirst = 0, /**< \internal First instance */
32 kDtRaclCtrlCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
41 kDtRaclCtrlRegBlockCore = 0, /**< */
42 kDtRaclCtrlRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/** Primary register block (associated with the "primary" set of registers that control the IP). */
46static const dt_racl_ctrl_reg_block_t kDtRaclCtrlRegBlockPrimary = kDtRaclCtrlRegBlockCore;
47
48/**
49 * List of IRQs.
50 *
51 * IRQs are guaranteed to be numbered consecutively from 0.
52 */
53typedef enum dt_racl_ctrl_irq {
54 kDtRaclCtrlIrqRaclError = 0, /**< RACL error has occurred. */
55 kDtRaclCtrlIrqCount = 1, /**< \internal Number of IRQs */
57
58/**
59 * List of Alerts.
60 *
61 * Alerts are guaranteed to be numbered consecutively from 0.
62 */
63typedef enum dt_racl_ctrl_alert {
64 kDtRaclCtrlAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
65 kDtRaclCtrlAlertRecovCtrlUpdateErr = 1, /**< This recoverable alert is triggered upon detecting an update error in the shadowed Control Register. */
66 kDtRaclCtrlAlertCount = 2, /**< \internal Number of Alerts */
68
69/**
70 * List of clock ports.
71 *
72 * Clock ports are guaranteed to be numbered consecutively from 0.
73 */
74typedef enum dt_racl_ctrl_clock {
75 kDtRaclCtrlClockClk = 0, /**< Clock port clk_i */
76 kDtRaclCtrlClockCount = 1, /**< \internal Number of clock ports */
78
79/**
80 * List of reset ports.
81 *
82 * Reset ports are guaranteed to be numbered consecutively from 0.
83 */
84typedef enum dt_racl_ctrl_reset {
85 kDtRaclCtrlResetRst = 0, /**< Reset port rst_ni */
86 kDtRaclCtrlResetCount = 1, /**< \internal Number of reset ports */
88
89
90/**
91 * Get the racl_ctrl instance from an instance ID
92 *
93 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
94 *
95 * @param inst_id Instance ID.
96 * @return A racl_ctrl instance.
97 *
98 * **Note:** This function only makes sense if the instance ID has device type racl_ctrl,
99 * otherwise the returned value is unspecified.
100 */
102
103/**
104 * Get the instance ID of an instance.
105 *
106 * @param dt Instance of racl_ctrl.
107 * @return The instance ID of that instance.
108 */
110
111/**
112 * Get the register base address of an instance.
113 *
114 * @param dt Instance of racl_ctrl.
115 * @param reg_block The register block requested.
116 * @return The register base address of the requested block.
117 */
120 dt_racl_ctrl_reg_block_t reg_block);
121
122/**
123 * Get the primary register base address of an instance.
124 *
125 * This is just a convenience function, equivalent to
126 * `dt_racl_ctrl_reg_block(dt, kDtRaclCtrlRegBlockCore)`
127 *
128 * @param dt Instance of racl_ctrl.
129 * @return The register base address of the primary register block.
130 */
131static inline uint32_t dt_racl_ctrl_primary_reg_block(
132 dt_racl_ctrl_t dt) {
133 return dt_racl_ctrl_reg_block(dt, kDtRaclCtrlRegBlockCore);
134}
135
136/**
137 * Get the PLIC ID of a racl_ctrl IRQ for a given instance.
138 *
139 * If the instance is not connected to the PLIC, this function
140 * will return `kDtPlicIrqIdNone`.
141 *
142 * @param dt Instance of racl_ctrl.
143 * @param irq A racl_ctrl IRQ.
144 * @return The PLIC ID of the IRQ of this instance.
145 */
149
150/**
151 * Convert a global IRQ ID to a local racl_ctrl IRQ type.
152 *
153 * @param dt Instance of racl_ctrl.
154 * @param irq A PLIC ID that belongs to this instance.
155 * @return The racl_ctrl IRQ, or `kDtRaclCtrlIrqCount`.
156 *
157 * **Note:** This function assumes that the PLIC ID belongs to the instance
158 * of racl_ctrl passed in parameter. In other words, it must be the case that
159 * `dt_racl_ctrl_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
160 * will return `kDtRaclCtrlIrqCount`.
161 */
164 dt_plic_irq_id_t irq);
165
166
167/**
168 * Get the alert ID of a racl_ctrl alert for a given instance.
169 *
170 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
171 * instances where the instance is not connected, the return value is unspecified.
172 *
173 * @param dt Instance of racl_ctrl.
174 * @param alert A racl_ctrl alert.
175 * @return The Alert Handler alert ID of the alert of this instance.
176 */
180
181/**
182 * Convert a global alert ID to a local racl_ctrl alert type.
183 *
184 * @param dt Instance of racl_ctrl.
185 * @param alert A global alert ID that belongs to this instance.
186 * @return The racl_ctrl alert, or `kDtRaclCtrlAlertCount`.
187 *
188 * **Note:** This function assumes that the global alert ID belongs to the
189 * instance of racl_ctrl passed in parameter. In other words, it must be the case
190 * that `dt_racl_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
191 * this function will return `kDtRaclCtrlAlertCount`.
192 */
195 dt_alert_id_t alert);
196
197
198
199/**
200 * Get the clock signal connected to a clock port of an instance.
201 *
202 * @param dt Instance of racl_ctrl.
203 * @param clk Clock port.
204 * @return Clock signal.
205 */
209
210/**
211 * Get the reset signal connected to a reset port of an instance.
212 *
213 * @param dt Instance of racl_ctrl.
214 * @param rst Reset port.
215 * @return Reset signal.
216 */
220
221
222
223#ifdef __cplusplus
224} // extern "C"
225#endif // __cplusplus
226
227#endif // OPENTITAN_DT_RACL_CTRL_H_