Software APIs
dt_racl_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RACL_CTRL_H_
8#define OPENTITAN_DT_RACL_CTRL_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP racl_ctrl and top darjeeling.
13 *
14 * This file contains the type definitions and global functions of the racl_ctrl.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_racl_ctrl {
26 kDtRaclCtrl = 0, /**< racl_ctrl */
27 kDtRaclCtrlFirst = 0, /**< \internal First instance */
28 kDtRaclCtrlCount = 1, /**< \internal Number of instances */
30
31/**
32 * List of register blocks.
33 *
34 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
35 */
37 kDtRaclCtrlRegBlockCore = 0, /**< */
38 kDtRaclCtrlRegBlockCount = 1, /**< \internal Number of register blocks */
40
41/** Primary register block (associated with the "primary" set of registers that control the IP). */
42static const dt_racl_ctrl_reg_block_t kDtRaclCtrlRegBlockPrimary = kDtRaclCtrlRegBlockCore;
43
44/**
45 * List of IRQs.
46 *
47 * IRQs are guaranteed to be numbered consecutively from 0.
48 */
49typedef enum dt_racl_ctrl_irq {
50 kDtRaclCtrlIrqRaclError = 0, /**< RACL error has occurred. */
51 kDtRaclCtrlIrqCount = 1, /**< \internal Number of IRQs */
53
54/**
55 * List of Alerts.
56 *
57 * Alerts are guaranteed to be numbered consecutively from 0.
58 */
59typedef enum dt_racl_ctrl_alert {
60 kDtRaclCtrlAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
61 kDtRaclCtrlAlertRecovCtrlUpdateErr = 1, /**< This recoverable alert is triggered upon detecting an update error in the shadowed Control Register. */
62 kDtRaclCtrlAlertCount = 2, /**< \internal Number of Alerts */
64
65/**
66 * List of clock ports.
67 *
68 * Clock ports are guaranteed to be numbered consecutively from 0.
69 */
70typedef enum dt_racl_ctrl_clock {
71 kDtRaclCtrlClockClk = 0, /**< Clock port clk_i */
72 kDtRaclCtrlClockCount = 1, /**< \internal Number of clock ports */
74
75/**
76 * List of reset ports.
77 *
78 * Reset ports are guaranteed to be numbered consecutively from 0.
79 */
80typedef enum dt_racl_ctrl_reset {
81 kDtRaclCtrlResetRst = 0, /**< Reset port rst_ni */
82 kDtRaclCtrlResetCount = 1, /**< \internal Number of reset ports */
84
85
86/**
87 * Get the racl_ctrl instance from an instance ID
88 *
89 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
90 *
91 * @param inst_id Instance ID.
92 * @return A racl_ctrl instance.
93 *
94 * **Note:** This function only makes sense if the instance ID has device type racl_ctrl,
95 * otherwise the returned value is unspecified.
96 */
98
99/**
100 * Get the instance ID of an instance.
101 *
102 * @param dt Instance of racl_ctrl.
103 * @return The instance ID of that instance.
104 */
106
107/**
108 * Get the register base address of an instance.
109 *
110 * @param dt Instance of racl_ctrl.
111 * @param reg_block The register block requested.
112 * @return The register base address of the requested block.
113 */
116 dt_racl_ctrl_reg_block_t reg_block);
117
118/**
119 * Get the primary register base address of an instance.
120 *
121 * This is just a convenience function, equivalent to
122 * `dt_racl_ctrl_reg_block(dt, kDtRaclCtrlRegBlockCore)`
123 *
124 * @param dt Instance of racl_ctrl.
125 * @return The register base address of the primary register block.
126 */
127static inline uint32_t dt_racl_ctrl_primary_reg_block(
128 dt_racl_ctrl_t dt) {
129 return dt_racl_ctrl_reg_block(dt, kDtRaclCtrlRegBlockCore);
130}
131
132/**
133 * Get the PLIC ID of a racl_ctrl IRQ for a given instance.
134 *
135 * If the instance is not connected to the PLIC, this function
136 * will return `kDtPlicIrqIdNone`.
137 *
138 * @param dt Instance of racl_ctrl.
139 * @param irq A racl_ctrl IRQ.
140 * @return The PLIC ID of the IRQ of this instance.
141 */
145
146/**
147 * Convert a global IRQ ID to a local racl_ctrl IRQ type.
148 *
149 * @param dt Instance of racl_ctrl.
150 * @param irq A PLIC ID that belongs to this instance.
151 * @return The racl_ctrl IRQ, or `kDtRaclCtrlIrqCount`.
152 *
153 * **Note:** This function assumes that the PLIC ID belongs to the instance
154 * of racl_ctrl passed in parameter. In other words, it must be the case that
155 * `dt_racl_ctrl_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
156 * will return `kDtRaclCtrlIrqCount`.
157 */
160 dt_plic_irq_id_t irq);
161
162
163/**
164 * Get the alert ID of a racl_ctrl alert for a given instance.
165 *
166 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
167 * instances where the instance is not connected, the return value is unspecified.
168 *
169 * @param dt Instance of racl_ctrl.
170 * @param alert A racl_ctrl alert.
171 * @return The Alert Handler alert ID of the alert of this instance.
172 */
176
177/**
178 * Convert a global alert ID to a local racl_ctrl alert type.
179 *
180 * @param dt Instance of racl_ctrl.
181 * @param alert A global alert ID that belongs to this instance.
182 * @return The racl_ctrl alert, or `kDtRaclCtrlAlertCount`.
183 *
184 * **Note:** This function assumes that the global alert ID belongs to the
185 * instance of racl_ctrl passed in parameter. In other words, it must be the case
186 * that `dt_racl_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
187 * this function will return `kDtRaclCtrlAlertCount`.
188 */
191 dt_alert_id_t alert);
192
193
194
195/**
196 * Get the clock signal connected to a clock port of an instance.
197 *
198 * @param dt Instance of racl_ctrl.
199 * @param clk Clock port.
200 * @return Clock signal.
201 */
205
206/**
207 * Get the reset signal connected to a reset port of an instance.
208 *
209 * @param dt Instance of racl_ctrl.
210 * @param rst Reset port.
211 * @return Reset signal.
212 */
216
217
218
219#endif // OPENTITAN_DT_RACL_CTRL_H_