dt_pwm.h

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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Device table API auto-generated by `dtgen`
 
#ifndef OPENTITAN_DT_PWM_H_
#define OPENTITAN_DT_PWM_H_
 
#ifdef __cplusplus
extern "C" {
#endif  // __cplusplus
 
/**
 * @file
 * @brief Device Tables (DT) for IP pwm and top earlgrey.
 *
 * This file contains the type definitions and global functions of the pwm.
 */
 
#include "hw/top/dt/dt_api.h"
#include <stdint.h>
 
 
 
 
 
/**
 * List of instances.
 */
typedef enum dt_pwm {
  kDtPwmAon = 0, /**< pwm_aon */
  kDtPwmFirst = 0, /**< \internal First instance */
  kDtPwmCount = 1, /**< \internal Number of instances */
} dt_pwm_t;
 
/**
 * List of register blocks.
 *
 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_pwm_reg_block {
  kDtPwmRegBlockCore = 0, /**<  */
  kDtPwmRegBlockCount = 1, /**< \internal Number of register blocks */
} dt_pwm_reg_block_t;
 
/**
 * List of memories.
 *
 * Memories are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_pwm_memory {
  kDtPwmMemoryCount = 0, /**< \internal Number of memories */
} dt_pwm_memory_t;
 
/** Primary register block (associated with the "primary" set of registers that control the IP). */
static const dt_pwm_reg_block_t kDtPwmRegBlockPrimary = kDtPwmRegBlockCore;
 
/**
 * List of Alerts.
 *
 * Alerts are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwm_alert {
  kDtPwmAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
  kDtPwmAlertCount = 1, /**< \internal Number of Alerts */
} dt_pwm_alert_t;
 
/**
 * List of clock ports.
 *
 * Clock ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwm_clock {
  kDtPwmClockClk = 0, /**< Clock port clk_i */
  kDtPwmClockCore = 1, /**< Clock port clk_core_i */
  kDtPwmClockCount = 2, /**< \internal Number of clock ports */
} dt_pwm_clock_t;
 
/**
 * List of reset ports.
 *
 * Reset ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwm_reset {
  kDtPwmResetRst = 0, /**< Reset port rst_ni */
  kDtPwmResetCore = 1, /**< Reset port rst_core_ni */
  kDtPwmResetCount = 2, /**< \internal Number of reset ports */
} dt_pwm_reset_t;
 
/**
 * List of peripheral I/O.
 *
 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwm_periph_io {
  kDtPwmPeriphIoPwm0 = 0, /**<  */
  kDtPwmPeriphIoPwm1 = 1, /**<  */
  kDtPwmPeriphIoPwm2 = 2, /**<  */
  kDtPwmPeriphIoPwm3 = 3, /**<  */
  kDtPwmPeriphIoPwm4 = 4, /**<  */
  kDtPwmPeriphIoPwm5 = 5, /**<  */
  kDtPwmPeriphIoCount = 6, /**< \internal Number of peripheral I/O */
} dt_pwm_periph_io_t;
 
/**
 * List of supported hardware features.
 */
#define OPENTITAN_PWM_HAS_DUTYCYCLE 1
#define OPENTITAN_PWM_HAS_BLINK 1
#define OPENTITAN_PWM_HAS_HEARTBEAT 1
#define OPENTITAN_PWM_HAS_POLARITY 1
#define OPENTITAN_PWM_HAS_CLOCKDIVIDER 1
#define OPENTITAN_PWM_HAS_PHASEDELAY 1
 
 
 
/**
 * Get the pwm instance from an instance ID
 *
 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
 *
 * @param inst_id Instance ID.
 * @return A pwm instance.
 *
 * **Note:** This function only makes sense if the instance ID has device type pwm,
 * otherwise the returned value is unspecified.
 */
dt_pwm_t dt_pwm_from_instance_id(dt_instance_id_t inst_id);
 
/**
 * Get the instance ID of an instance.
 *
 * @param dt Instance of pwm.
 * @return The instance ID of that instance.
 */
dt_instance_id_t dt_pwm_instance_id(dt_pwm_t dt);
 
/**
 * Get the register base address of an instance.
 *
 * @param dt Instance of pwm.
 * @param reg_block The register block requested.
 * @return The register base address of the requested block.
 */
uint32_t dt_pwm_reg_block(
    dt_pwm_t dt,
    dt_pwm_reg_block_t reg_block);
 
/**
 * Get the primary register base address of an instance.
 *
 * This is just a convenience function, equivalent to
 * `dt_pwm_reg_block(dt, kDtPwmRegBlockCore)`
 *
 * @param dt Instance of pwm.
 * @return The register base address of the primary register block.
 */
static inline uint32_t dt_pwm_primary_reg_block(
    dt_pwm_t dt) {
  return dt_pwm_reg_block(dt, kDtPwmRegBlockCore);
}
 
/**
 * Get the base address of a memory.
 *
 * @param dt Instance of pwm.
 * @param mem The memory requested.
 * @return The base address of the requested memory.
 */
uint32_t dt_pwm_memory_base(
    dt_pwm_t dt,
    dt_pwm_memory_t mem);
 
/**
 * Get the size of a memory.
 *
 * @param dt Instance of pwm.
 * @param mem The memory requested.
 * @return The size of the requested memory.
 */
uint32_t dt_pwm_memory_size(
    dt_pwm_t dt,
    dt_pwm_memory_t mem);
 
 
/**
 * Get the alert ID of a pwm alert for a given instance.
 *
 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
 * instances where the instance is not connected, the return value is unspecified.
 *
 * @param dt Instance of pwm.
 * @param alert A pwm alert.
 * @return The Alert Handler alert ID of the alert of this instance.
 */
dt_alert_id_t dt_pwm_alert_to_alert_id(
    dt_pwm_t dt,
    dt_pwm_alert_t alert);
 
/**
 * Convert a global alert ID to a local pwm alert type.
 *
 * @param dt Instance of pwm.
 * @param alert A global alert ID that belongs to this instance.
 * @return The pwm alert, or `kDtPwmAlertCount`.
 *
 * **Note:** This function assumes that the global alert ID belongs to the
 * instance of pwm passed in parameter. In other words, it must be the case
 * that `dt_pwm_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
 * this function will return `kDtPwmAlertCount`.
 */
dt_pwm_alert_t dt_pwm_alert_from_alert_id(
    dt_pwm_t dt,
    dt_alert_id_t alert);
 
 
/**
 * Get the peripheral I/O description of an instance.
 *
 * @param dt Instance of pwm.
 * @param sig Requested peripheral I/O.
 * @return Description of the requested peripheral I/O for this instance.
 */
dt_periph_io_t dt_pwm_periph_io(
    dt_pwm_t dt,
    dt_pwm_periph_io_t sig);
 
/**
 * Get the clock signal connected to a clock port of an instance.
 *
 * @param dt Instance of pwm.
 * @param clk Clock port.
 * @return Clock signal.
 */
dt_clock_t dt_pwm_clock(
    dt_pwm_t dt,
    dt_pwm_clock_t clk);
 
/**
 * Get the reset signal connected to a reset port of an instance.
 *
 * @param dt Instance of pwm.
 * @param rst Reset port.
 * @return Reset signal.
 */
dt_reset_t dt_pwm_reset(
    dt_pwm_t dt,
    dt_pwm_reset_t rst);
 
 
 
/**
 * Get the Number of output channels.
 *
 * @param dt Instance of pwm.
 * @return Number of output channels.
 */
uint8_t dt_pwm_output_channel_count(dt_pwm_t dt);
 
 
 
#ifdef __cplusplus
}  // extern "C"
#endif  // __cplusplus
 
#endif  // OPENTITAN_DT_PWM_H_