Software APIs
dt_pwm.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_PWM_H_
8#define OPENTITAN_DT_PWM_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP pwm and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the pwm.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22
23
24/**
25 * List of instances.
26 */
27typedef enum dt_pwm {
28 kDtPwmAon = 0, /**< pwm_aon */
29 kDtPwmFirst = 0, /**< \internal First instance */
30 kDtPwmCount = 1, /**< \internal Number of instances */
32
33/**
34 * List of register blocks.
35 *
36 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
37 */
38typedef enum dt_pwm_reg_block {
39 kDtPwmRegBlockCore = 0, /**< */
40 kDtPwmRegBlockCount = 1, /**< \internal Number of register blocks */
42
43/** Primary register block (associated with the "primary" set of registers that control the IP). */
44static const dt_pwm_reg_block_t kDtPwmRegBlockPrimary = kDtPwmRegBlockCore;
45
46/**
47 * List of Alerts.
48 *
49 * Alerts are guaranteed to be numbered consecutively from 0.
50 */
51typedef enum dt_pwm_alert {
52 kDtPwmAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
53 kDtPwmAlertCount = 1, /**< \internal Number of Alerts */
55
56/**
57 * List of clock ports.
58 *
59 * Clock ports are guaranteed to be numbered consecutively from 0.
60 */
61typedef enum dt_pwm_clock {
62 kDtPwmClockClk = 0, /**< Clock port clk_i */
63 kDtPwmClockCore = 1, /**< Clock port clk_core_i */
64 kDtPwmClockCount = 2, /**< \internal Number of clock ports */
66
67/**
68 * List of reset ports.
69 *
70 * Reset ports are guaranteed to be numbered consecutively from 0.
71 */
72typedef enum dt_pwm_reset {
73 kDtPwmResetRst = 0, /**< Reset port rst_ni */
74 kDtPwmResetCore = 1, /**< Reset port rst_core_ni */
75 kDtPwmResetCount = 2, /**< \internal Number of reset ports */
77
78/**
79 * List of peripheral I/O.
80 *
81 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
82 */
83typedef enum dt_pwm_periph_io {
84 kDtPwmPeriphIoPwm0 = 0, /**< */
85 kDtPwmPeriphIoPwm1 = 1, /**< */
86 kDtPwmPeriphIoPwm2 = 2, /**< */
87 kDtPwmPeriphIoPwm3 = 3, /**< */
88 kDtPwmPeriphIoPwm4 = 4, /**< */
89 kDtPwmPeriphIoPwm5 = 5, /**< */
90 kDtPwmPeriphIoCount = 6, /**< \internal Number of peripheral I/O */
92
93/**
94 * List of supported hardware features.
95 */
96#define OPENTITAN_PWM_HAS_DUTYCYCLE 1
97#define OPENTITAN_PWM_HAS_BLINK 1
98#define OPENTITAN_PWM_HAS_HEARTBEAT 1
99#define OPENTITAN_PWM_HAS_POLARITY 1
100#define OPENTITAN_PWM_HAS_CLOCKDIVIDER 1
101#define OPENTITAN_PWM_HAS_PHASEDELAY 1
102
103
104
105/**
106 * Get the pwm instance from an instance ID
107 *
108 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
109 *
110 * @param inst_id Instance ID.
111 * @return A pwm instance.
112 *
113 * **Note:** This function only makes sense if the instance ID has device type pwm,
114 * otherwise the returned value is unspecified.
115 */
117
118/**
119 * Get the instance ID of an instance.
120 *
121 * @param dt Instance of pwm.
122 * @return The instance ID of that instance.
123 */
125
126/**
127 * Get the register base address of an instance.
128 *
129 * @param dt Instance of pwm.
130 * @param reg_block The register block requested.
131 * @return The register base address of the requested block.
132 */
133uint32_t dt_pwm_reg_block(
134 dt_pwm_t dt,
135 dt_pwm_reg_block_t reg_block);
136
137/**
138 * Get the primary register base address of an instance.
139 *
140 * This is just a convenience function, equivalent to
141 * `dt_pwm_reg_block(dt, kDtPwmRegBlockCore)`
142 *
143 * @param dt Instance of pwm.
144 * @return The register base address of the primary register block.
145 */
146static inline uint32_t dt_pwm_primary_reg_block(
147 dt_pwm_t dt) {
148 return dt_pwm_reg_block(dt, kDtPwmRegBlockCore);
149}
150
151
152/**
153 * Get the alert ID of a pwm alert for a given instance.
154 *
155 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
156 * instances where the instance is not connected, the return value is unspecified.
157 *
158 * @param dt Instance of pwm.
159 * @param alert A pwm alert.
160 * @return The Alert Handler alert ID of the alert of this instance.
161 */
163 dt_pwm_t dt,
164 dt_pwm_alert_t alert);
165
166/**
167 * Convert a global alert ID to a local pwm alert type.
168 *
169 * @param dt Instance of pwm.
170 * @param alert A global alert ID that belongs to this instance.
171 * @return The pwm alert, or `kDtPwmAlertCount`.
172 *
173 * **Note:** This function assumes that the global alert ID belongs to the
174 * instance of pwm passed in parameter. In other words, it must be the case
175 * that `dt_pwm_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
176 * this function will return `kDtPwmAlertCount`.
177 */
179 dt_pwm_t dt,
180 dt_alert_id_t alert);
181
182
183/**
184 * Get the peripheral I/O description of an instance.
185 *
186 * @param dt Instance of pwm.
187 * @param sig Requested peripheral I/O.
188 * @return Description of the requested peripheral I/O for this instance.
189 */
191 dt_pwm_t dt,
193
194/**
195 * Get the clock signal connected to a clock port of an instance.
196 *
197 * @param dt Instance of pwm.
198 * @param clk Clock port.
199 * @return Clock signal.
200 */
202 dt_pwm_t dt,
203 dt_pwm_clock_t clk);
204
205/**
206 * Get the reset signal connected to a reset port of an instance.
207 *
208 * @param dt Instance of pwm.
209 * @param rst Reset port.
210 * @return Reset signal.
211 */
213 dt_pwm_t dt,
214 dt_pwm_reset_t rst);
215
216
217
218/**
219 * Get the Number of output channels.
220 *
221 * @param dt Instance of pwm.
222 * @return Number of output channels.
223 */
225
226
227
228#endif // OPENTITAN_DT_PWM_H_