Software APIs
dt_pwm.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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#ifndef OPENTITAN_DT_PWM_H_
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#define OPENTITAN_DT_PWM_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
// __cplusplus
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/**
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* @file
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* @brief Device Tables (DT) for IP pwm and top earlgrey.
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*
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* This file contains the type definitions and global functions of the pwm.
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*/
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#include "
dt_api.h
"
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#include <stdint.h>
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/**
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* List of instances.
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*/
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typedef
enum
dt_pwm
{
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kDtPwmAon
= 0,
/**< pwm_aon */
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kDtPwmFirst = 0,
/**< \internal First instance */
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kDtPwmCount = 1,
/**< \internal Number of instances */
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}
dt_pwm_t
;
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/**
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* List of register blocks.
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*
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* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_pwm_reg_block
{
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kDtPwmRegBlockCore = 0,
/**< */
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kDtPwmRegBlockCount = 1,
/**< \internal Number of register blocks */
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}
dt_pwm_reg_block_t
;
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/** Primary register block (associated with the "primary" set of registers that control the IP). */
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static
const
dt_pwm_reg_block_t
kDtPwmRegBlockPrimary = kDtPwmRegBlockCore;
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/**
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* List of Alerts.
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*
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* Alerts are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwm_alert
{
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kDtPwmAlertFatalFault
= 0,
/**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
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kDtPwmAlertCount = 1,
/**< \internal Number of Alerts */
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}
dt_pwm_alert_t
;
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/**
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* List of clock ports.
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*
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* Clock ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwm_clock
{
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kDtPwmClockClk
= 0,
/**< Clock port clk_i */
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kDtPwmClockCore
= 1,
/**< Clock port clk_core_i */
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kDtPwmClockCount = 2,
/**< \internal Number of clock ports */
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}
dt_pwm_clock_t
;
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/**
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* List of reset ports.
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*
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* Reset ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwm_reset
{
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kDtPwmResetRst
= 0,
/**< Reset port rst_ni */
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kDtPwmResetCore
= 1,
/**< Reset port rst_core_ni */
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kDtPwmResetCount = 2,
/**< \internal Number of reset ports */
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}
dt_pwm_reset_t
;
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/**
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* List of peripheral I/O.
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*
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* Peripheral I/O are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwm_periph_io
{
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kDtPwmPeriphIoPwm0 = 0,
/**< */
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kDtPwmPeriphIoPwm1 = 1,
/**< */
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kDtPwmPeriphIoPwm2 = 2,
/**< */
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kDtPwmPeriphIoPwm3 = 3,
/**< */
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kDtPwmPeriphIoPwm4 = 4,
/**< */
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kDtPwmPeriphIoPwm5 = 5,
/**< */
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kDtPwmPeriphIoCount = 6,
/**< \internal Number of peripheral I/O */
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}
dt_pwm_periph_io_t
;
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/**
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* List of supported hardware features.
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*/
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#define OPENTITAN_PWM_HAS_DUTYCYCLE 1
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#define OPENTITAN_PWM_HAS_BLINK 1
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#define OPENTITAN_PWM_HAS_HEARTBEAT 1
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#define OPENTITAN_PWM_HAS_POLARITY 1
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#define OPENTITAN_PWM_HAS_CLOCKDIVIDER 1
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#define OPENTITAN_PWM_HAS_PHASEDELAY 1
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/**
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* Get the pwm instance from an instance ID
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*
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* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
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*
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* @param inst_id Instance ID.
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* @return A pwm instance.
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*
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* **Note:** This function only makes sense if the instance ID has device type pwm,
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* otherwise the returned value is unspecified.
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*/
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dt_pwm_t
dt_pwm_from_instance_id
(
dt_instance_id_t
inst_id);
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/**
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* Get the instance ID of an instance.
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*
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* @param dt Instance of pwm.
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* @return The instance ID of that instance.
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*/
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dt_instance_id_t
dt_pwm_instance_id
(
dt_pwm_t
dt);
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/**
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* Get the register base address of an instance.
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*
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* @param dt Instance of pwm.
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* @param reg_block The register block requested.
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* @return The register base address of the requested block.
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*/
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uint32_t
dt_pwm_reg_block
(
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dt_pwm_t
dt,
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dt_pwm_reg_block_t
reg_block);
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/**
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* Get the primary register base address of an instance.
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*
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* This is just a convenience function, equivalent to
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* `dt_pwm_reg_block(dt, kDtPwmRegBlockCore)`
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*
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* @param dt Instance of pwm.
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* @return The register base address of the primary register block.
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*/
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static
inline
uint32_t dt_pwm_primary_reg_block(
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dt_pwm_t
dt) {
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return
dt_pwm_reg_block
(dt, kDtPwmRegBlockCore);
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}
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/**
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* Get the alert ID of a pwm alert for a given instance.
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*
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* **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
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* instances where the instance is not connected, the return value is unspecified.
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*
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* @param dt Instance of pwm.
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* @param alert A pwm alert.
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* @return The Alert Handler alert ID of the alert of this instance.
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*/
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dt_alert_id_t
dt_pwm_alert_to_alert_id
(
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dt_pwm_t
dt,
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dt_pwm_alert_t
alert);
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/**
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* Convert a global alert ID to a local pwm alert type.
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*
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* @param dt Instance of pwm.
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* @param alert A global alert ID that belongs to this instance.
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* @return The pwm alert, or `kDtPwmAlertCount`.
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*
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* **Note:** This function assumes that the global alert ID belongs to the
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* instance of pwm passed in parameter. In other words, it must be the case
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* that `dt_pwm_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
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* this function will return `kDtPwmAlertCount`.
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*/
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dt_pwm_alert_t
dt_pwm_alert_from_alert_id
(
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dt_pwm_t
dt,
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dt_alert_id_t
alert);
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/**
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* Get the peripheral I/O description of an instance.
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*
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* @param dt Instance of pwm.
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* @param sig Requested peripheral I/O.
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* @return Description of the requested peripheral I/O for this instance.
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*/
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dt_periph_io_t
dt_pwm_periph_io
(
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dt_pwm_t
dt,
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dt_pwm_periph_io_t
sig);
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/**
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* Get the clock signal connected to a clock port of an instance.
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*
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* @param dt Instance of pwm.
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* @param clk Clock port.
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* @return Clock signal.
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*/
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dt_clock_t
dt_pwm_clock
(
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dt_pwm_t
dt,
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dt_pwm_clock_t
clk);
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/**
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* Get the reset signal connected to a reset port of an instance.
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*
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* @param dt Instance of pwm.
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* @param rst Reset port.
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* @return Reset signal.
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*/
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dt_reset_t
dt_pwm_reset
(
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dt_pwm_t
dt,
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dt_pwm_reset_t
rst);
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/**
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* Get the Number of output channels.
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*
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* @param dt Instance of pwm.
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* @return Number of output channels.
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*/
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uint8_t
dt_pwm_output_channel_count
(
dt_pwm_t
dt);
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#ifdef __cplusplus
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}
// extern "C"
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#endif
// __cplusplus
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#endif
// OPENTITAN_DT_PWM_H_
(earlgrey)
hw
top
dt
dt_pwm.h
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