Software APIs
dif_sysrst_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_SYSRST_CTRL_H_
6#define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_SYSRST_CTRL_H_
7
8/**
9 * @file
10 * @brief <a href="/hw/ip/sysrst_ctrl/doc/">System Reset Controller</a> Device
11 * Interface Functions
12 */
13
15#include "sysrst_ctrl_regs.h" // Generated.
16
17#ifdef __cplusplus
18extern "C" {
19#endif // __cplusplus
20
21/**
22 * A System Reset Controller key combination.
23 */
25 /**
26 * Key combination 0.
27 */
29 /**
30 * Key combination 1.
31 */
33 /**
34 * Key combination 2.
35 */
37 /**
38 * Key combination 3.
39 */
41 /**
42 * All key combination ORed together.
43 *
44 * This is useful when clearing all key combination IRQ causes at once, e.g.,
45 * when initializing the System Reset Controller.
46 */
49
50/**
51 * System Reset Controller keys that can form a key combination.
52 */
53typedef enum dif_sysrst_ctrl_key {
54 /**
55 * Key 0.
56 */
58 /**
59 * Key 1.
60 */
62 /**
63 * Key 2.
64 */
66 /**
67 * Power button key.
68 */
70 /**
71 * AC power preset key.
72 */
74 /**
75 * All keys ORed together.
76 */
77 kDifSysrstCtrlKeyAll = (1U << 5) - 1,
79
80/**
81 * System Reset Controller key combination detection actions.
82 */
84 /**
85 * Disable / disconnect battery.
86 */
88 /**
89 * Issue an interrupt to the processor.
90 */
92 /**
93 * Assert the embedded controller reset for a specified duration.
94 */
96 /**
97 * Issue a reset request to the reset manager block.
98 */
100 /**
101 * All actions.
102 */
105
106/**
107 * Runtime configuration for the System Reset Controller key combination
108 * detection feature.
109 */
111 /**
112 * The keys that comprise the pre-condition key combination to detect (i.e.,
113 * one or more `dif_sysrst_ctrl_key_t`s ORed together).
114 */
116 /**
117 * The duration the pre-condition key combination should be pressed to enable
118 * triggering an action by an additional key combination press.
119 *
120 * Units: increments of 5us; [0, 2^32) represents [0, 60) seconds.
121 */
123 /**
124 * The keys that comprise the key combination to detect (i.e., one or more
125 * `dif_sysrst_ctrl_key_t`s ORed together).
126 */
127 uint32_t keys;
128 /**
129 * The duration the key combination should be pressed to trigger an action.
130 *
131 * Units: increments of 5us; [0, 2^32) represents [0, 60) seconds.
132 */
134 /**
135 * The actions to trigger after detecting the key press combination (one or
136 * more `dif_sysrst_ctrl_key_combo_action_t`s ORed together).
137 */
138 uint32_t actions;
139 /**
140 * The embedded controller's reset pulse width.
141 *
142 * Note: only applicable if the `kDifSysrstCtrlKeyComboActionEcReset` action
143 * is enabled for the key combination.
144 *
145 * Units: increments of 5us; [0, 2^16) represents [10, 200) milliseconds.
146 */
149
150/**
151 * System Reset Controller input signal changes that may be detected.
152 */
154 /**
155 * Power button input signal high-to-low.
156 */
158 /**
159 * Key 0 input signal high-to-low.
160 */
162 /**
163 * Key 1 input signal high-to-low.
164 */
166 /**
167 * Key 2 input signal high-to-low.
168 */
170 /**
171 * AC power present input signal high-to-low.
172 */
174 /**
175 * Embedded controller reset input signal high-to-low.
176 */
178 /**
179 * Flash write protect input signal high-to-low.
180 */
182 /**
183 * Power button input signal low-to-high.
184 */
186 /**
187 * Key 0 input signal low-to-high.
188 */
190 /**
191 * Key 1 input signal low-to-high.
192 */
194 /**
195 * Key 2 input signal low-to-high.
196 */
198 /**
199 * AC power present input signal low-to-high.
200 */
202 /**
203 * Embedded controller reset input signal low-to-high.
204 */
206 /**
207 * Flash write protect input signal low-to-high.
208 */
210 /**
211 * All input signal transitions.
212 */
213 kDifSysrstCtrlInputAll = ((1U << 14) - 1),
215
216/**
217 * System Reset Controller key interrupt sources.
218 */
220 /**
221 * Power button input signal high-to-low.
222 */
224 1U << SYSRST_CTRL_KEY_INTR_STATUS_PWRB_H2L_BIT,
225 /**
226 * Key 0 input signal high-to-low.
227 */
229 1U << SYSRST_CTRL_KEY_INTR_STATUS_KEY0_IN_H2L_BIT,
230 /**
231 * Key 1 input signal high-to-low.
232 */
234 1U << SYSRST_CTRL_KEY_INTR_STATUS_KEY1_IN_H2L_BIT,
235 /**
236 * Key 2 input signal high-to-low.
237 */
239 1U << SYSRST_CTRL_KEY_INTR_STATUS_KEY2_IN_H2L_BIT,
240 /**
241 * AC power present input signal high-to-low.
242 */
244 1U << SYSRST_CTRL_KEY_INTR_STATUS_AC_PRESENT_H2L_BIT,
245 /**
246 * Embedded controller reset input signal high-to-low.
247 */
249 1U << SYSRST_CTRL_KEY_INTR_STATUS_EC_RST_L_H2L_BIT,
250 /**
251 * Flash write protect input signal high-to-low.
252 */
254 1U << SYSRST_CTRL_KEY_INTR_STATUS_FLASH_WP_L_H2L_BIT,
255 /**
256 * Power button input signal low-to-high.
257 */
259 1U << SYSRST_CTRL_KEY_INTR_STATUS_PWRB_L2H_BIT,
260 /**
261 * Key 0 input signal low-to-high.
262 */
264 1U << SYSRST_CTRL_KEY_INTR_STATUS_KEY0_IN_L2H_BIT,
265 /**
266 * Key 1 input signal low-to-high.
267 */
269 1U << SYSRST_CTRL_KEY_INTR_STATUS_KEY1_IN_L2H_BIT,
270 /**
271 * Key 2 input signal low-to-high.
272 */
274 1U << SYSRST_CTRL_KEY_INTR_STATUS_KEY2_IN_L2H_BIT,
275 /**
276 * AC power present input signal low-to-high.
277 */
279 1U << SYSRST_CTRL_KEY_INTR_STATUS_AC_PRESENT_L2H_BIT,
280 /**
281 * Embedded controller reset input signal low-to-high.
282 */
284 1U << SYSRST_CTRL_KEY_INTR_STATUS_EC_RST_L_L2H_BIT,
285 /**
286 * Flash write protect input signal low-to-high.
287 */
289 1U << SYSRST_CTRL_KEY_INTR_STATUS_FLASH_WP_L_L2H_BIT,
291
292/**
293 * System Reset Controller combo interrupt sources.
294 */
296 /**
297 * Power button input signal high-to-low.
298 */
300 1U << SYSRST_CTRL_COMBO_INTR_STATUS_COMBO0_H2L_BIT,
301 /**
302 * Key 0 input signal high-to-low.
303 */
305 1U << SYSRST_CTRL_COMBO_INTR_STATUS_COMBO1_H2L_BIT,
306 /**
307 * Key 1 input signal high-to-low.
308 */
310 1U << SYSRST_CTRL_COMBO_INTR_STATUS_COMBO2_H2L_BIT,
311 /**
312 * Key 2 input signal high-to-low.
313 */
315 1U << SYSRST_CTRL_COMBO_INTR_STATUS_COMBO3_H2L_BIT,
317
318/**
319 * Runtime configuration for the System Reset Controller input signal change
320 * detection feature.
321 */
323 /**
324 * A combination of input signal changes to detect (one or more
325 * `dif_sysrst_ctrl_input_change_t`s ORed together).
326 */
328 /**
329 * The time to allow the input signal to stabilize before reevaluating its
330 * value to decide whether to trigger an interrupt.
331 *
332 * Units: increments of 5us; [0, 2^16) represents [0, 200) milliseconds.
333 */
336
337/**
338 * Runtime configuration for the System Reset Controller key signal
339 * auto-override feature.
340 *
341 * Upon detection of a Power Button high-to-low transition, the signals from
342 * generic keys 0 through 2 may be overriden with specified values.
343 */
345 /**
346 * The time to allow the Power Button signal to stabilize before reevaluating
347 * its value to decide whether it was pressed.
348 *
349 * Units: increments of 5us; [0, 2^16) represents [0, 200) milliseconds.
350 */
352 /**
353 * Whether to override the key 0 signal.
354 */
356 /**
357 * The value to override onto the key 0 signal.
358 */
360 /**
361 * Whether to override the key 1 signal.
362 */
364 /**
365 * The value to override onto the key 1 signal.
366 */
368 /**
369 * Whether to override the key 2 signal.
370 */
372 /**
373 * The value to override onto the key 2 signal.
374 */
377
378/**
379 * System Reset Controller pins that can be inverted, read, or overridden.
380 */
382 /**
383 * Key 0 input.
384 */
386 /**
387 * Key 0 output.
388 */
390 /**
391 * Key 1 input.
392 */
394 /**
395 * Key 1 output.
396 */
398 /**
399 * Key 2 input.
400 */
402 /**
403 * Key 2 output.
404 */
406 /**
407 * Power button input.
408 */
410 /**
411 * Power button output.
412 */
414 /**
415 * AC power preset input.
416 */
418 /**
419 * Battery disable output.
420 */
422 /**
423 * Lid open input.
424 */
426 /**
427 * Z3 Wakeup output.
428 */
430 /**
431 * Embedded controller reset inout.
432 */
434 /**
435 * Flash write protect inout.
436 */
438 /**
439 * All non open drain pins.
440 */
443
444/**
445 * Runtime configuration for the System Reset Controller output pin override
446 * feature.
447 */
449 /**
450 * The enablement of the output pin's override feature.
451 */
453 /**
454 * Whether to allow overriding the output pin with a value of 0.
455 */
457 /**
458 * Whether to allow overriding the output pin with a value of 1.
459 */
461 /**
462 * The override value to write.
463 *
464 * Note: writing a non-allowable value will cause
465 * `dif_sysrst_ctrl_output_pin_override_configure()` to return `kDifBadArg`.
466 */
469
470/**
471 * Runtime configuration for the System Reset Controller ultra-low-power (ULP)
472 * wakeup feature.
473 *
474 * When enabled, detection of any of the following conditions:
475 *
476 * 1. HIGH level on the AC Power present signal, or
477 * 2. HIGH --> LOW transition on the Power Button signal, or
478 * 3. LOW --> HIGH transition on the Lid Open signal,
479 *
480 * will cause the System Reset Controller to assert the Z3 Wakeup output signal
481 * and trigger an interrupt, which will also issue a wakeup request to the power
482 * manager.
483 */
485 /**
486 * The enablement of the ULP wakeup feature.
487 */
489 /**
490 * The time to allow the AC Power present signal to stabilize before
491 * reevaluating its value to decide whether it was activated.
492 *
493 * Units: increments of 5us; [0, 2^16) represents [10, 200) milliseconds.
494 */
496 /**
497 * The time to allow the Lid Open signal to stabilize before reevaluating its
498 * value to decide whether it was activated.
499 *
500 * Units: increments of 5us; [0, 2^16) represents [10, 200) milliseconds.
501 */
503 /**
504 * The time to allow the Power Button signal to stabilize before reevaluating
505 * its value to decide whether it was pressed.
506 *
507 * Units: increments of 5us; [0, 2^16) represents [10, 200) milliseconds.
508 */
511
512/**
513 * Configures a System Reset Controller's key combination detection feature.
514 *
515 * @param sysrst_ctrl A System Reset Controller handle.
516 * @param key_combo Key combination to configure.
517 * @param config Runtime configuration parameters.
518 * @return The result of the operation.
519 */
522 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_key_combo_t key_combo,
524
525/**
526 * Configures a System Reset Controller's input signal change detection feature.
527 *
528 * @param sysrst_ctrl A System Reset Controller handle.
529 * @param config Runtime configuration parameters.
530 * @return The result of the operation.
531 */
534 const dif_sysrst_ctrl_t *sysrst_ctrl,
536
537/**
538 * Configures a System Reset Controller's output pin override feature.
539 *
540 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
541 * value. Attempting to configure the override feature for input pins will
542 * return `kDifBadArg`.
543 *
544 * @param sysrst_ctrl A System Reset Controller handle.
545 * @param output_pin Output pin to configure.
546 * @param config Output pin override configuration parameters.
547 * @return The result of the operation.
548 */
551 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t output_pin,
553
554/**
555 * Configures a System Reset Controller's key signal auto-override feature.
556 *
557 * Upon detection of a Power Button high-to-low transition, the signals from
558 * generic keys 0 through 2 may be overriden with specified values.
559 *
560 * @param sysrst_ctrl A System Reset Controller handle.
561 * @param config Runtime configuration parameters.
562 * @param enabled Whether to enable the feature or not.
563 * @return The result of the operation.
564 */
567 const dif_sysrst_ctrl_t *sysrst_ctrl,
569
570/**
571 * Configures a System Reset Controller's ultra-low-power (ULP) wakeup feature.
572 *
573 * @param sysrst_ctrl A System Reset Controller handle.
574 * @param config Runtime configuration parameters.
575 * @return The result of the operation.
576 */
579 const dif_sysrst_ctrl_t *sysrst_ctrl,
581
582/**
583 * Sets the enablement state of a System Reset Controller's ultra-low-power
584 * (ULP) wakeup feature.
585 *
586 * @param sysrst_ctrl A System Reset Controller handle.
587 * @param enabled The enablement state to configure the ULP wakeup feature in.
588 * @return The result of the operation.
589 */
592 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_toggle_t enabled);
593
594/**
595 * Gets the enablement state of a System Reset Controller's ultra-low-power
596 * (ULP) wakeup feature.
597 *
598 * @param sysrst_ctrl A System Reset Controller handle.
599 * @param[out] is_enabled The enablement state of the ULP wakeup feature.
600 * @return The result of the operation.
601 */
604 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_toggle_t *is_enabled);
605
606/**
607 * Sets the inversion state a System Reset Controller's input and output pins.
608 *
609 * Note, only input and output (NOT inout) pins may be inverted. Attempting
610 * to set the inversion state of inout pins will return `kDifBadArg`.
611 *
612 * @param sysrst_ctrl A System Reset Controller handle.
613 * @param pins The input and output pins to set the inverted state of (i.e., one
614 * or more `dif_sysrst_ctrl_pin_t`s ORed together).
615 * @param inverted The inverted state to configure for the pins.
616 * @return The result of the operation.
617 */
620 const dif_sysrst_ctrl_t *sysrst_ctrl, uint32_t pins, bool inverted);
621
622/**
623 * Gets the inversion state a System Reset Controller's input and output pins.
624 *
625 * @param sysrst_ctrl A System Reset Controller handle.
626 * @param[out] inverted_pins The input and output pins that are inverted (i.e.,
627 * one or more `dif_sysrst_ctrl_pin_t`s ORed
628 * together).
629 * @return The result of the operation.
630 */
633 const dif_sysrst_ctrl_t *sysrst_ctrl, uint32_t *inverted_pins);
634
635/**
636 * Sets allowable override values for a System Reset Controller's output pin.
637 *
638 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
639 * value. Attempting to set the allowable override values for input pins will
640 * return `kDifBadArg`.
641 *
642 * @param sysrst_ctrl A System Reset Controller handle.
643 * @param pin The output pin whose allowable override values should be set.
644 * @param allow_zero Whether to allow overriding the pin's value to 0.
645 * @param allow_one Whether to allow overriding the pin's value to 1.
646 * @return The result of the operation.
647 */
650 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
651 bool allow_zero, bool allow_one);
652
653/**
654 * Gets allowable override values for a System Reset Controller's output pin.
655 *
656 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
657 * value. Attempting to get the allowable override values for input pins will
658 * return `kDifBadArg`.
659 *
660 * @param sysrst_ctrl A System Reset Controller handle.
661 * @param pin The allowable override values to get for an output pin.
662 * @param[out] allow_zero Whether overriding the pin's value to 0 is allowed.
663 * @param[out] allow_one Whether overriding the pin's value to 1 is allowed.
664 * @return The result of the operation.
665 */
668 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
669 bool *allow_zero, bool *allow_one);
670
671/**
672 * Sets the enablement of a System Reset Controller's output pin override
673 * feature.
674 *
675 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
676 * value. Attempting to set the enablement of the override feature for input
677 * pins will return `kDifBadArg`.
678 *
679 * @param sysrst_ctrl A System Reset Controller handle.
680 * @param pin The output pin whose override feature should be set.
681 * @param enabled The enablement state to configure the override feature in.
682 * @return The result of the operation.
683 */
686 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
687 dif_toggle_t enabled);
688
689/**
690 * Gets the enablement of a System Reset Controller's output pin override
691 * feature.
692 *
693 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
694 * value. Attempting to get the enablement of the override feature for input
695 * pins will return `kDifBadArg`.
696 *
697 * @param sysrst_ctrl A System Reset Controller handle.
698 * @param pin The output pin whose override feature should be set.
699 * @param[out] is_enabled The enablement state the override feature is
700 * configured in.
701 * @return The result of the operation.
702 */
705 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
706 dif_toggle_t *is_enabled);
707
708/**
709 * Sets the override value of a System Reset Controller's output pin (like
710 * writing to a GPIO pin).
711 *
712 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
713 * value. Attempting to set the override value of an input pin will return
714 * `kDifBadArg`.
715 *
716 * @param sysrst_ctrl A System Reset Controller handle.
717 * @param pin The output pin to override.
718 * @param value The override value to set on the pin.
719 * @return The result of the operation.
720 */
723 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
724 bool value);
725
726/**
727 * Gets the override value of a System Reset Controller's output pin (like
728 * writing to a GPIO pin).
729 *
730 * Note, only output (or inout) pins may be overriden, i.e., set to a specific
731 * value. Attempting to get the override value of an input pin will return
732 * `kDifBadArg`.
733 *
734 * Additionally, this will return the configured override value of an output pin
735 * regardless if the override function is enabled or the override value is
736 * allowed.
737 *
738 * @param sysrst_ctrl A System Reset Controller handle.
739 * @param pin The output pin to override.
740 * @param[out] value The override value set on the pin.
741 * @return The result of the operation.
742 */
745 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
746 bool *value);
747
748/**
749 * Reads a System Reset Controller's input pin (like a GPIO pin).
750 *
751 * Note, only input (or inout) pins may be read. Attempting to read the value of
752 * an output pin will return `kDifBadArg`.
753 *
754 * @param sysrst_ctrl A System Reset Controller handle.
755 * @param pin The pin to read.
756 * @param[out] value The value set on the pin.
757 * @return The result of the operation.
758 */
761 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_pin_t pin,
762 bool *value);
763
764/**
765 * Sets the enablement of a System Reset Controller's key signal auto-override
766 * feature.
767 *
768 * Note, this feature is only available for keys 0, 1, and 2. Attempting to
769 * enable the auto-override feature on non-supported keys will return
770 * `kDifBadArg`.
771 *
772 * @param sysrst_ctrl A System Reset Controller handle.
773 * @param key The key to enable the override feature for.
774 * @param enabled Whether to enable the feature or not.
775 * @return The result of the operation.
776 */
779 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_key_t key,
780 dif_toggle_t enabled);
781
782/**
783 * Gets the enablement of a System Reset Controller's key signal auto-override
784 * feature.
785 *
786 * Note, this feature is only available for keys 0, 1, and 2. Attempting to
787 * check whether the auto-override feature is enabled non-supported keys will
788 * return `kDifBadArg`.
789 *
790 * @param sysrst_ctrl A System Reset Controller handle.
791 * @param key The key the override feature is enabled for.
792 * @param[out] is_enabled Whether the feature is enabled or not.
793 * @return The result of the operation.
794 */
797 const dif_sysrst_ctrl_t *sysrst_ctrl, dif_sysrst_ctrl_key_t key,
798 dif_toggle_t *is_enabled);
799
800/**
801 * Gets the cause(s) of a key combination detection IRQ.
802 *
803 * @param sysrst_ctrl An sysrst_ctrl handle.
804 * @param[out] causes The causes of the IRQ (one or more
805 * `dif_sysrst_ctrl_key_combo_t`s ORed together).
806 * @return The result of the operation.
807 */
810 const dif_sysrst_ctrl_t *sysrst_ctrl, uint32_t *causes);
811
812/**
813 * Clears the cause(s) of a key combination detection IRQ.
814 *
815 * @param sysrst_ctrl An sysrst_ctrl handle.
816 * @param causes The causes of the IRQ (one or more
817 * `dif_sysrst_ctrl_key_combo_t`s ORed together).
818 * @return The result of the operation.
819 */
822 const dif_sysrst_ctrl_t *sysrst_ctrl, uint32_t causes);
823
824/**
825 * Gets the cause(s) of an input signal change detection IRQ.
826 *
827 * @param sysrst_ctrl An sysrst_ctrl handle.
828 * @param[out] causes The causes of the IRQ (one or more
829 * `dif_sysrst_ctrl_input_change_t`s ORed together).
830 * @return The result of the operation.
831 */
834 const dif_sysrst_ctrl_t *sysrst_ctrl, uint32_t *causes);
835
836/**
837 * Clears the cause(s) of an input signal change detection IRQ.
838 *
839 * @param sysrst_ctrl An sysrst_ctrl handle.
840 * @param causes The causes of the IRQ (one or more
841 * `dif_sysrst_ctrl_input_change_t`s ORed together).
842 * @return The result of the operation.
843 */
846 const dif_sysrst_ctrl_t *sysrst_ctrl, uint32_t causes);
847
848/**
849 * Gets the ultra-low-power wakeup status.
850 *
851 * @param sysrst_ctrl An sysrst_ctrl handle.
852 * @param[out] wakeup_detected The ULP wakeup detection state.
853 * @return The result of the operation.
854 */
857 const dif_sysrst_ctrl_t *sysrst_ctrl, bool *wakeup_detected);
858
859/**
860 * Clears the ultra-low-power wakeup status.
861 *
862 * @param sysrst_ctrl An sysrst_ctrl handle.
863 * @return The result of the operation.
864 */
867 const dif_sysrst_ctrl_t *sysrst_ctrl);
868
869/**
870 * Locks System Reset Controller configurations.
871 *
872 * This function is reentrant: calling it while locked will have no effect and
873 * return `kDifOk`.
874 *
875 * @param sysrst_ctrl A System Reset Controller handle.
876 * @return The result of the operation.
877 */
880
881/**
882 * Checks whether System Reset Controller configurations are locked.
883 *
884 * @param sysrst_ctrl A System Reset Controller handle.
885 * @param[out] is_locked Out-param for the locked state.
886 * @return The result of the operation.
887 */
890 bool *is_locked);
891
892#ifdef __cplusplus
893} // extern "C"
894#endif // __cplusplus
895
896#endif // OPENTITAN_SW_DEVICE_LIB_DIF_DIF_SYSRST_CTRL_H_