7 #include "sw/device/lib/base/multibits.h"
9 #include "sram_ctrl_regs.h"
18 return mmio_region_read32(sram_ctrl->
base_addr,
19 SRAM_CTRL_CTRL_REGWEN_REG_OFFSET)
31 return mmio_region_read32(sram_ctrl->
base_addr,
32 SRAM_CTRL_EXEC_REGWEN_REG_OFFSET)
43 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_CTRL_REGWEN_REG_OFFSET,
54 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_EXEC_REGWEN_REG_OFFSET,
63 static uint32_t sram_ctrl_get_status(
const dif_sram_ctrl_t *sram_ctrl) {
64 return mmio_region_read32(sram_ctrl->
base_addr, SRAM_CTRL_STATUS_REG_OFFSET);
68 if (sram_ctrl == NULL) {
72 if (sram_ctrl_locked_ctrl(sram_ctrl)) {
79 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_CTRL_REG_OFFSET, reg);
84 status = sram_ctrl_get_status(sram_ctrl);
89 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_CTRL_REG_OFFSET, reg);
93 status = sram_ctrl_get_status(sram_ctrl);
101 if (sram_ctrl == NULL) {
105 if (sram_ctrl_locked_ctrl(sram_ctrl)) {
111 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_CTRL_REG_OFFSET, reg);
117 if (sram_ctrl == NULL) {
121 if (sram_ctrl_locked_ctrl(sram_ctrl)) {
126 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_CTRL_REG_OFFSET, reg);
133 if (sram_ctrl == NULL) {
141 *
status = sram_ctrl_get_status(sram_ctrl);
148 if (sram_ctrl == NULL || state == NULL) {
153 mmio_region_read32(sram_ctrl->
base_addr, SRAM_CTRL_EXEC_REG_OFFSET);
162 if (sram_ctrl == NULL) {
166 if (sram_ctrl_exec_locked(sram_ctrl)) {
172 mmio_region_write32(sram_ctrl->
base_addr, SRAM_CTRL_EXEC_REG_OFFSET, value);
179 if (sram_ctrl == NULL) {
185 sram_ctrl_lock_ctrl(sram_ctrl);
188 sram_ctrl_lock_exec(sram_ctrl);
200 if (sram_ctrl == NULL || is_locked == NULL) {
206 *is_locked = sram_ctrl_locked_ctrl(sram_ctrl);
209 *is_locked = sram_ctrl_exec_locked(sram_ctrl);
219 multi_bit_bool_t *success,
220 multi_bit_bool_t clear) {
221 if (sram_ctrl == NULL || success == NULL) {
231 *success = mmio_region_read32(sram_ctrl->
base_addr,
232 SRAM_CTRL_SCR_KEY_ROTATED_REG_OFFSET);
233 mmio_region_write32(sram_ctrl->
base_addr,
234 SRAM_CTRL_SCR_KEY_ROTATED_REG_OFFSET, clear);