Software APIs
dif_spi_device_autogen.c
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 // THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
6 // util/make_new_dif.py --mode=regen --only=autogen
7 
8 #include "sw/device/lib/dif/autogen/dif_spi_device_autogen.h"
9 
10 #include <stdint.h>
11 
12 #include "sw/device/lib/dif/dif_base.h"
13 
14 #include "spi_device_regs.h" // Generated.
15 
16 OT_WARN_UNUSED_RESULT
17 dif_result_t dif_spi_device_init(mmio_region_t base_addr,
18  dif_spi_device_t *spi_device) {
19  if (spi_device == NULL) {
20  return kDifBadArg;
21  }
22 
23  spi_device->base_addr = base_addr;
24 
25  return kDifOk;
26 }
27 
28 dif_result_t dif_spi_device_alert_force(const dif_spi_device_t *spi_device,
29  dif_spi_device_alert_t alert) {
30  if (spi_device == NULL) {
31  return kDifBadArg;
32  }
33 
34  bitfield_bit32_index_t alert_idx;
35  switch (alert) {
36  case kDifSpiDeviceAlertFatalFault:
37  alert_idx = SPI_DEVICE_ALERT_TEST_FATAL_FAULT_BIT;
38  break;
39  default:
40  return kDifBadArg;
41  }
42 
43  uint32_t alert_test_reg = bitfield_bit32_write(0, alert_idx, true);
44  mmio_region_write32(spi_device->base_addr,
45  (ptrdiff_t)SPI_DEVICE_ALERT_TEST_REG_OFFSET,
46  alert_test_reg);
47 
48  return kDifOk;
49 }
50 
51 /**
52  * Get the corresponding interrupt register bit offset of the IRQ.
53  */
54 static bool spi_device_get_irq_bit_index(dif_spi_device_irq_t irq,
55  bitfield_bit32_index_t *index_out) {
56  switch (irq) {
57  case kDifSpiDeviceIrqUploadCmdfifoNotEmpty:
58  *index_out = SPI_DEVICE_INTR_COMMON_UPLOAD_CMDFIFO_NOT_EMPTY_BIT;
59  break;
60  case kDifSpiDeviceIrqUploadPayloadNotEmpty:
61  *index_out = SPI_DEVICE_INTR_COMMON_UPLOAD_PAYLOAD_NOT_EMPTY_BIT;
62  break;
63  case kDifSpiDeviceIrqUploadPayloadOverflow:
64  *index_out = SPI_DEVICE_INTR_COMMON_UPLOAD_PAYLOAD_OVERFLOW_BIT;
65  break;
66  case kDifSpiDeviceIrqReadbufWatermark:
67  *index_out = SPI_DEVICE_INTR_COMMON_READBUF_WATERMARK_BIT;
68  break;
69  case kDifSpiDeviceIrqReadbufFlip:
70  *index_out = SPI_DEVICE_INTR_COMMON_READBUF_FLIP_BIT;
71  break;
72  case kDifSpiDeviceIrqTpmHeaderNotEmpty:
73  *index_out = SPI_DEVICE_INTR_COMMON_TPM_HEADER_NOT_EMPTY_BIT;
74  break;
75  case kDifSpiDeviceIrqTpmRdfifoCmdEnd:
76  *index_out = SPI_DEVICE_INTR_COMMON_TPM_RDFIFO_CMD_END_BIT;
77  break;
78  case kDifSpiDeviceIrqTpmRdfifoDrop:
79  *index_out = SPI_DEVICE_INTR_COMMON_TPM_RDFIFO_DROP_BIT;
80  break;
81  default:
82  return false;
83  }
84 
85  return true;
86 }
87 
88 static dif_irq_type_t irq_types[] = {
89  kDifIrqTypeEvent, kDifIrqTypeEvent, kDifIrqTypeEvent, kDifIrqTypeEvent,
90  kDifIrqTypeEvent, kDifIrqTypeStatus, kDifIrqTypeEvent, kDifIrqTypeEvent,
91 };
92 
93 OT_WARN_UNUSED_RESULT
94 dif_result_t dif_spi_device_irq_get_type(const dif_spi_device_t *spi_device,
95  dif_spi_device_irq_t irq,
96  dif_irq_type_t *type) {
97  if (spi_device == NULL || type == NULL || irq < 0 ||
98  irq > kDifSpiDeviceIrqTpmRdfifoDrop) {
99  return kDifBadArg;
100  }
101 
102  *type = irq_types[irq];
103 
104  return kDifOk;
105 }
106 
107 OT_WARN_UNUSED_RESULT
108 dif_result_t dif_spi_device_irq_get_state(
109  const dif_spi_device_t *spi_device,
110  dif_spi_device_irq_state_snapshot_t *snapshot) {
111  if (spi_device == NULL || snapshot == NULL) {
112  return kDifBadArg;
113  }
114 
115  *snapshot = mmio_region_read32(spi_device->base_addr,
116  (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET);
117 
118  return kDifOk;
119 }
120 
121 OT_WARN_UNUSED_RESULT
122 dif_result_t dif_spi_device_irq_acknowledge_state(
123  const dif_spi_device_t *spi_device,
124  dif_spi_device_irq_state_snapshot_t snapshot) {
125  if (spi_device == NULL) {
126  return kDifBadArg;
127  }
128 
129  mmio_region_write32(spi_device->base_addr,
130  (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET, snapshot);
131 
132  return kDifOk;
133 }
134 
135 OT_WARN_UNUSED_RESULT
136 dif_result_t dif_spi_device_irq_is_pending(const dif_spi_device_t *spi_device,
137  dif_spi_device_irq_t irq,
138  bool *is_pending) {
139  if (spi_device == NULL || is_pending == NULL) {
140  return kDifBadArg;
141  }
142 
143  bitfield_bit32_index_t index;
144  if (!spi_device_get_irq_bit_index(irq, &index)) {
145  return kDifBadArg;
146  }
147 
148  uint32_t intr_state_reg = mmio_region_read32(
149  spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET);
150 
151  *is_pending = bitfield_bit32_read(intr_state_reg, index);
152 
153  return kDifOk;
154 }
155 
156 OT_WARN_UNUSED_RESULT
157 dif_result_t dif_spi_device_irq_acknowledge_all(
158  const dif_spi_device_t *spi_device) {
159  if (spi_device == NULL) {
160  return kDifBadArg;
161  }
162 
163  // Writing to the register clears the corresponding bits (Write-one clear).
164  mmio_region_write32(spi_device->base_addr,
165  (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET, UINT32_MAX);
166 
167  return kDifOk;
168 }
169 
170 OT_WARN_UNUSED_RESULT
171 dif_result_t dif_spi_device_irq_acknowledge(const dif_spi_device_t *spi_device,
172  dif_spi_device_irq_t irq) {
173  if (spi_device == NULL) {
174  return kDifBadArg;
175  }
176 
177  bitfield_bit32_index_t index;
178  if (!spi_device_get_irq_bit_index(irq, &index)) {
179  return kDifBadArg;
180  }
181 
182  // Writing to the register clears the corresponding bits (Write-one clear).
183  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
184  mmio_region_write32(spi_device->base_addr,
185  (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET,
186  intr_state_reg);
187 
188  return kDifOk;
189 }
190 
191 OT_WARN_UNUSED_RESULT
192 dif_result_t dif_spi_device_irq_force(const dif_spi_device_t *spi_device,
193  dif_spi_device_irq_t irq,
194  const bool val) {
195  if (spi_device == NULL) {
196  return kDifBadArg;
197  }
198 
199  bitfield_bit32_index_t index;
200  if (!spi_device_get_irq_bit_index(irq, &index)) {
201  return kDifBadArg;
202  }
203 
204  uint32_t intr_test_reg = bitfield_bit32_write(0, index, val);
205  mmio_region_write32(spi_device->base_addr,
206  (ptrdiff_t)SPI_DEVICE_INTR_TEST_REG_OFFSET,
207  intr_test_reg);
208 
209  return kDifOk;
210 }
211 
212 OT_WARN_UNUSED_RESULT
213 dif_result_t dif_spi_device_irq_get_enabled(const dif_spi_device_t *spi_device,
214  dif_spi_device_irq_t irq,
215  dif_toggle_t *state) {
216  if (spi_device == NULL || state == NULL) {
217  return kDifBadArg;
218  }
219 
220  bitfield_bit32_index_t index;
221  if (!spi_device_get_irq_bit_index(irq, &index)) {
222  return kDifBadArg;
223  }
224 
225  uint32_t intr_enable_reg = mmio_region_read32(
226  spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_ENABLE_REG_OFFSET);
227 
228  bool is_enabled = bitfield_bit32_read(intr_enable_reg, index);
229  *state = is_enabled ? kDifToggleEnabled : kDifToggleDisabled;
230 
231  return kDifOk;
232 }
233 
234 OT_WARN_UNUSED_RESULT
235 dif_result_t dif_spi_device_irq_set_enabled(const dif_spi_device_t *spi_device,
236  dif_spi_device_irq_t irq,
237  dif_toggle_t state) {
238  if (spi_device == NULL) {
239  return kDifBadArg;
240  }
241 
242  bitfield_bit32_index_t index;
243  if (!spi_device_get_irq_bit_index(irq, &index)) {
244  return kDifBadArg;
245  }
246 
247  uint32_t intr_enable_reg = mmio_region_read32(
248  spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_ENABLE_REG_OFFSET);
249 
250  bool enable_bit = (state == kDifToggleEnabled) ? true : false;
251  intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
252  mmio_region_write32(spi_device->base_addr,
253  (ptrdiff_t)SPI_DEVICE_INTR_ENABLE_REG_OFFSET,
254  intr_enable_reg);
255 
256  return kDifOk;
257 }
258 
259 OT_WARN_UNUSED_RESULT
260 dif_result_t dif_spi_device_irq_disable_all(
261  const dif_spi_device_t *spi_device,
262  dif_spi_device_irq_enable_snapshot_t *snapshot) {
263  if (spi_device == NULL) {
264  return kDifBadArg;
265  }
266 
267  // Pass the current interrupt state to the caller, if requested.
268  if (snapshot != NULL) {
269  *snapshot = mmio_region_read32(
270  spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_ENABLE_REG_OFFSET);
271  }
272 
273  // Disable all interrupts.
274  mmio_region_write32(spi_device->base_addr,
275  (ptrdiff_t)SPI_DEVICE_INTR_ENABLE_REG_OFFSET, 0u);
276 
277  return kDifOk;
278 }
279 
280 OT_WARN_UNUSED_RESULT
281 dif_result_t dif_spi_device_irq_restore_all(
282  const dif_spi_device_t *spi_device,
283  const dif_spi_device_irq_enable_snapshot_t *snapshot) {
284  if (spi_device == NULL || snapshot == NULL) {
285  return kDifBadArg;
286  }
287 
288  mmio_region_write32(spi_device->base_addr,
289  (ptrdiff_t)SPI_DEVICE_INTR_ENABLE_REG_OFFSET, *snapshot);
290 
291  return kDifOk;
292 }
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