Software APIs
dif_rv_core_ibex.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_RV_CORE_IBEX_H_
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#define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_RV_CORE_IBEX_H_
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#include <stdint.h>
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#include "
sw/device/lib/base/macros.h
"
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#include "
sw/device/lib/base/mmio.h
"
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#include "
sw/device/lib/dif/dif_base.h
"
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#include "sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.h"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
// __cplusplus
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/**
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* @file
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* Access to Ibex state (e.g. addresses, crashdumps, alerts)
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*/
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/**
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* Address translation slot selection.
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*/
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typedef
enum
dif_rv_core_ibex_addr_translation_slot
{
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kDifRvCoreIbexAddrTranslationSlot_0,
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kDifRvCoreIbexAddrTranslationSlot_1,
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kDifRvCoreIbexAddrTranslationSlotCount,
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}
dif_rv_core_ibex_addr_translation_slot_t
;
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/**
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* Address translation bus selection.
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*/
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typedef
enum
dif_rv_core_ibex_addr_translation_bus
{
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kDifRvCoreIbexAddrTranslationDBus,
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kDifRvCoreIbexAddrTranslationIBus,
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kDifRvCoreIbexAddrTranslationBusCount,
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}
dif_rv_core_ibex_addr_translation_bus_t
;
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/**
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* Address translation matching region.
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*
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* The value programmed is done at power-of-2 alignment. For example, if the
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* intended matching region is 0x8000_0000 to 0x8000_FFFF, the value
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* programmed is 0x8000_7FFF.
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*
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* The value programmed can be determined from the translation granule. Assume
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* the user wishes to translate a specific 64KB block to a different address:
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* 64KB has a hex value of 0x10000. Subtract 1 from this value and then right
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* shift by one to obtain 0x7FFF. This value is then logically OR'd with the
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* upper address bits that would select which 64KB to translate.
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*/
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typedef
struct
dif_rv_core_ibex_addr_translation_mapping
{
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/**
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* Matching address (Virtual address).
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* When an incoming transaction matches the matching
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* region, it is redirected to the new address. If a transaction does not
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* match, then it is directly passed through.
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*/
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uintptr_t
matching_addr
;
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/**
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* Remap address (Physical address).
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* The region where the matched transtaction will be
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* redirected to.
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*/
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uintptr_t
remap_addr
;
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/**
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* Address region size.
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*/
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size_t
size
;
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}
dif_rv_core_ibex_addr_translation_mapping_t
;
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/**
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* Ibex error status detected by `rv_core_ibex` peripheral.
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*/
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typedef
enum
dif_rv_core_ibex_error_status
{
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/**
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* Register transmission integrity error.
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*/
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kDifRvCoreIbexErrorStatusRegisterTransmissionIntegrity
= 1 << 0,
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/**
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* Response integrity error.
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*/
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kDifRvCoreIbexErrorStatusFatalResponseIntegrity
= 1 << 8,
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/**
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* Fatal internal error (`alert_major_internal_o` from Ibex seen).
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*/
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kDifRvCoreIbexErrorStatusFatalInternalError
= 1 << 9,
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/**
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* recoverable internal error (`alert_minor` from Ibex seen).
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*/
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kDifRvCoreIbexErrorStatusRecoverableInternal
= 1 << 10,
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/**
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* All errors combined.
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*/
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kDifRvCoreIbexErrorStatusAll
= (1 << 0 | 1 << 8 | 1 << 9 | 1 << 10),
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}
dif_rv_core_ibex_error_status_t
;
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typedef
enum
dif_rv_core_ibex_rnd_status_code
{
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/**
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* The current rnd word is valid.
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*/
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kDifRvCoreIbexRndStatusValid
= 1 << 0,
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/**
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* The current rnd word is fips compliant.
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*/
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kDifRvCoreIbexRndStatusFipsCompliant
= 1 << 1,
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} dif_rv_core_ibex_rnd_status_code_t;
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/**
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* Bitmask with the `dif_rv_core_ibex_rnd_status_code_t` values.
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*/
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typedef
uint32_t
dif_rv_core_ibex_rnd_status_t
;
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/**
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* NMI enabled status and current state.
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*/
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typedef
struct
dif_rv_core_ibex_nmi_state
{
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/**
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* NMI alert is currently enabled.
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*/
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bool
alert_enabled
;
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/**
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* Alert has been raised.
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*/
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bool
alert_raised
;
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/**
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* NMI watchdog is currently enabled.
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*/
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bool
wdog_enabled
;
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/**
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* Watchdog has barked.
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*/
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bool
wdog_barked
;
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}
dif_rv_core_ibex_nmi_state_t
;
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typedef
enum
dif_rv_core_ibex_nmi_source
{
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/**
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* NMI alert handler.
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*/
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kDifRvCoreIbexNmiSourceAlert
= 1 << 0,
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/**
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* NMI watchdog bark.
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*/
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kDifRvCoreIbexNmiSourceWdog
= 1 << 1,
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/**
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* All ibex NMIs.
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*/
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kDifRvCoreIbexNmiSourceAll
= 0x3,
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} dif_rv_core_ibex_nmi_source_t;
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typedef
struct
dif_rv_core_ibex_crash_dump_state
{
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/**
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* The last exception address.
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*/
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uint32_t
mtval
;
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/**
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* The last exception PC.
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*/
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uint32_t
mpec
;
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/**
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* The last data access address.
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*/
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uint32_t
mdaa
;
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/**
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* The next PC.
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*/
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uint32_t
mnpc
;
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/**
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* The current PC.
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*/
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uint32_t
mcpc
;
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} dif_rv_core_ibex_crash_dump_state_t;
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typedef
struct
dif_rv_core_ibex_previous_crash_dump_state
{
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/**
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* The exception address for the previous crash.
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*/
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uint32_t
mtval
;
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/**
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* The last exception PC for the previous crash.
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*/
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uint32_t
mpec
;
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} dif_rv_core_ibex_previous_crash_dump_state_t;
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/**
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* Under normal circumstances, only the current crash dump state is valid. When
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* the CPU encounters a double fault, the current crash dump is moved to
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* previous, and the new crash dump is shown in current.
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*/
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typedef
struct
dif_rv_core_ibex_crash_dump_info
{
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/**
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* The crash dump state for the current execution.
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*/
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dif_rv_core_ibex_crash_dump_state_t
fault_state
;
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/**
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* The crash dump state for the previous execution. It will only contain valid
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* data in case of a double fault, which will be indicated by the
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* `double_fault` member.
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*/
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dif_rv_core_ibex_previous_crash_dump_state_t
previous_fault_state
;
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/**
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* `kDifToggleEnabled` if a double fault happened, otherwise
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* `kDifToggleDisabled`
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*/
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dif_toggle_t
double_fault
;
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}
dif_rv_core_ibex_crash_dump_info_t
;
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/**
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* Configure address translation for
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* the given `bus` (either instruction or data) in the `slot`.
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*
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* @param rv_core_ibex Handle.
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* @param slot Slot to be used.
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* @param bus Bus to be translated.
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* @param addr_map Address mapping description.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_configure_addr_translation
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_addr_translation_slot_t
slot,
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dif_rv_core_ibex_addr_translation_bus_t
bus,
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dif_rv_core_ibex_addr_translation_mapping_t
addr_map);
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/**
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* Enable address translation for
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* the given `bus` (either instruction or data) in the `slot`.
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*
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* @param rv_core_ibex Handle.
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* @param slot Slot to be used.
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* @param bus Bus to be translated.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_enable_addr_translation
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_addr_translation_slot_t
slot,
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dif_rv_core_ibex_addr_translation_bus_t
bus);
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/**
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* Disable address translation for
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* the given `bus` (either instruction or data) in the `slot`.
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*
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* @param rv_core_ibex Handle.
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* @param slot Slot to be used.
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* @param bus Bus to be translated.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_disable_addr_translation
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_addr_translation_slot_t
slot,
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dif_rv_core_ibex_addr_translation_bus_t
bus);
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/**
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* Read a discription of the address mapping configured on a given `slot`
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* for a given `bus`.
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*
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* @param rv_core_ibex Handle.
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* @param slot Slot of interest.
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* @param bus Bus of interest.
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* @param[out] addr_map Description of address mapping.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_read_addr_translation
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_addr_translation_slot_t
slot,
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dif_rv_core_ibex_addr_translation_bus_t
bus,
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dif_rv_core_ibex_addr_translation_mapping_t
*addr_map);
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/**
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* Lock the address translation settings for a given `slot` and `bus` registers.
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* Once locked it can no longer be unlocked until the next system reset. This
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* function will quietly do nothing if the settings are already locked.
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*
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* @param rv_core_ibex Handle.
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* @param slot Slot to be locked.
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* @param bus Translated bus to be locked.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_lock_addr_translation
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_addr_translation_slot_t
slot,
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dif_rv_core_ibex_addr_translation_bus_t
bus);
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/**
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* Read the ibex error status.
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*
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* @param rv_core_ibex Handle.
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* @param error_status Pointer to receive the error status value.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_get_error_status
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_error_status_t
*error_status);
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/**
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* Clear the ibex error status, after the software has handled it.
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*
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* @param rv_core_ibex Handle.
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* @param error_status The error to be cleared.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_clear_error_status
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_error_status_t
error_status);
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/**
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* Enables NMI support for security alert events and watchdog bark.
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*
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* @param rv_core_ibex Handle.
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* @param nmi A bitmask with nmi sources to be enabled.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_enable_nmi
(
const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_nmi_source_t nmi);
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/**
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* Read the NMI enable status and current event state.
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*
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* @param rv_core_ibex Handle.
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* @param[out] nmi_state The nmi state.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_get_nmi_state
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_nmi_state_t
*nmi_state);
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/**
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* Clear the NMI current event state.
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*
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* @param rv_core_ibex Handle
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* @param nmi A bitmask with nmi sources to be cleared.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_clear_nmi_state
(
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const
dif_rv_core_ibex_t
*rv_core_ibex, dif_rv_core_ibex_nmi_source_t nmi);
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/**
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* Gets whether the rnd data is either valid or is FIPS compliant.
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*
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* @param rv_core_ibex Handle.
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* @param[out] status Pointer to be filled with the current rnd status.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_get_rnd_status
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
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dif_rv_core_ibex_rnd_status_t
*
status
);
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/**
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* Reads a random word from the RISC-V Ibex core wrapper.
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*
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* @param rv_core_ibex Handle.
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* @param[out] data Pointer to be filled with the random word.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_read_rnd_data
(
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const
dif_rv_core_ibex_t
*rv_core_ibex, uint32_t *data);
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typedef
uint32_t dif_rv_core_ibex_fpga_info_t;
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/**
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* Read the FPGA build timestamp info. This function only returns valid data for
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* fpga environments, for all other environments it is simply 0.
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*
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* @param rv_core_ibex Handle.
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* @param[out] info A pointer to receive the FPGA timestamp info.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_read_fpga_info
(
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const
dif_rv_core_ibex_t
*rv_core_ibex, dif_rv_core_ibex_fpga_info_t *info);
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/**
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* Software fatal alert. When triggered,
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* a fatal alert is sent. Note, this alert once cleared cannot be set and
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* will continuously cause alert events.
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*/
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/**
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* Get the software recoverable alert sate.
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*
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* @param rv_core_ibex Handle.
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* @param[out] enabled Returns `true` if enabled.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
dif_result_t
dif_rv_core_ibex_get_sw_recov_err_alert
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
bool
*enabled);
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/**
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* Software recoverable alert. When triggered, a recoverable alert is sent. Once
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* the alert is sent, the register is then reset to disabled.
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*
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* @param rv_core_ibex Handle.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_trigger_sw_recov_err_alert
(
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const
dif_rv_core_ibex_t
*rv_core_ibex);
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/**
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* Get the software fatal alert trigger status.
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*
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* @param rv_core_ibex Handle.
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* @param[out] enabled Returns `true` if enabled.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_get_sw_fatal_err_alert
(
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const
dif_rv_core_ibex_t
*rv_core_ibex,
bool
*enabled);
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/**
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* Software fatal alert. When triggered, a fatal alert is sent. Note, once this
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* alert is triggered it cannot be reset and will continuously cause alert
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* events.
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*
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* @param rv_core_ibex Handle.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_trigger_sw_fatal_err_alert
(
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const
dif_rv_core_ibex_t
*rv_core_ibex);
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/**
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* Parse the cpu info read from the rstmgr.
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*
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* @param rv_core_ibex Handle.
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* @param cpu_info Buffer with the cpu info read from the rstmgr.
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* @param cpu_info_len The amount of words in the `cpu_info` buffer.
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* @param[out] crash_dump_info Parsed dump.
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* @return The result of the operation.
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*/
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OT_WARN_UNUSED_RESULT
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dif_result_t
dif_rv_core_ibex_parse_crash_dump
(
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const
dif_rv_core_ibex_t
*rv_core_ibex, uint32_t *cpu_info,
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uint32_t cpu_info_len,
dif_rv_core_ibex_crash_dump_info_t
*crash_dump_info);
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#ifdef __cplusplus
465
}
// extern "C"
466
#endif
// __cplusplus
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#endif
// OPENTITAN_SW_DEVICE_LIB_DIF_DIF_RV_CORE_IBEX_H_
sw
device
lib
dif
dif_rv_core_ibex.h
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