Software APIs
dif_pwrmgr_unittest.cc
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 #include "sw/device/lib/dif/dif_pwrmgr.h"
6 
7 #include <array>
8 
9 #include "gtest/gtest.h"
10 #include "sw/device/lib/base/mmio.h"
11 #include "sw/device/lib/base/mock_mmio.h"
12 #include "sw/device/lib/dif/dif_base.h"
13 #include "sw/device/lib/dif/dif_test_base.h"
14 
15 #include "pwrmgr_regs.h" // Generated
16 
17 namespace dif_pwrmgr_unittest {
18 namespace {
19 
20 /**
21  * The following values are for Earlgrey.
22  */
23 typedef enum dif_pwrmgr_wakeup_request_source {
24  kDifPwrmgrWakeupRequestSourceOne = (1u << 0),
25  kDifPwrmgrWakeupRequestSourceTwo = (1u << 1),
26  kDifPwrmgrWakeupRequestSourceThree = (1u << 2),
27  kDifPwrmgrWakeupRequestSourceFour = (1u << 3),
28  kDifPwrmgrWakeupRequestSourceFive = (1u << 4),
29  kDifPwrmgrWakeupRequestSourceSix = (1u << 5),
30 } dif_pwrmgr_wakeup_request_source_t;
31 
32 typedef enum dif_pwrmgr_reset_request_source {
33  kDifPwrmgrResetRequestSourceOne = (1u << 0),
34  kDifPwrmgrResetRequestSourceTwo = (1u << 1),
35 } dif_pwrmgr_reset_request_source_t;
36 
37 /**
38  * Returns a `uint32_t` with a single zero bit.
39  */
40 uint32_t AllOnesExcept(uint32_t index) { return ~(1u << index); }
41 
42 /**
43  * Common constants used in tests.
44  */
45 static constexpr std::array<dif_toggle_t, 2> kAllToggles = {
46  kDifToggleDisabled,
47  kDifToggleEnabled,
48 };
49 static constexpr std::array<bool, 2> kAllBools = {true, false};
50 static constexpr dif_toggle_t kBadToggle = static_cast<dif_toggle_t>(2);
51 static constexpr dif_pwrmgr_req_type_t kBadReqType =
52  static_cast<dif_pwrmgr_req_type_t>(kDifPwrmgrReqTypeReset + 1);
53 static constexpr dif_pwrmgr_domain_config_t kBadConfig =
54  std::numeric_limits<uint8_t>::max();
55 static constexpr dif_pwrmgr_request_sources_t kBadSources =
56  std::numeric_limits<uint32_t>::max();
57 
58 // Base class for the rest of the tests in this file, provides a
59 // `dif_pwrmgr_t` instance.
60 class DifPwrmgrInitialized : public testing::Test, public mock_mmio::MmioTest {
61  protected:
62  /**
63  * Expectations for functions that need to sync data to slow clock domain.
64  *
65  * Sync is triggered by writing a 1 to the CFG_CDC_SYNC register, which is
66  * reset back to 0 by the hardware when the operation is complete.
67  */
68  void ExpectSync() {
69  EXPECT_WRITE32(PWRMGR_CFG_CDC_SYNC_REG_OFFSET, 1);
70  // Insert a small random delay.
71  uint8_t rand_delay = dev().GarbageMemory<uint32_t>() & 0x7F;
72  for (uint8_t i = 0; i < rand_delay; ++i) {
73  EXPECT_READ32(PWRMGR_CFG_CDC_SYNC_REG_OFFSET, 1);
74  }
75  EXPECT_READ32(PWRMGR_CFG_CDC_SYNC_REG_OFFSET, 0);
76  }
77 
78  /**
79  * Initialized `dif_pwrmgr_t` used in tests.
80  */
81  const dif_pwrmgr_t pwrmgr_ = {.base_addr = dev().region()};
82 };
83 
84 class LowPowerTest : public DifPwrmgrInitialized {};
85 
86 TEST_F(LowPowerTest, SetBadArgs) {
87  EXPECT_DIF_BADARG(dif_pwrmgr_low_power_set_enabled(nullptr, kDifToggleEnabled,
88  kDifToggleEnabled));
89  EXPECT_DIF_BADARG(dif_pwrmgr_low_power_set_enabled(&pwrmgr_, kBadToggle,
90  kDifToggleEnabled));
91  EXPECT_DIF_BADARG(dif_pwrmgr_low_power_set_enabled(
92  &pwrmgr_, kDifToggleEnabled, kBadToggle));
93  EXPECT_DIF_BADARG(
94  dif_pwrmgr_low_power_set_enabled(nullptr, kBadToggle, kDifToggleEnabled));
95  EXPECT_DIF_BADARG(
96  dif_pwrmgr_low_power_set_enabled(nullptr, kDifToggleEnabled, kBadToggle));
97  EXPECT_DIF_BADARG(
98  dif_pwrmgr_low_power_set_enabled(&pwrmgr_, kBadToggle, kBadToggle));
99  EXPECT_DIF_BADARG(
100  dif_pwrmgr_low_power_set_enabled(nullptr, kBadToggle, kBadToggle));
101 }
102 
103 TEST_F(LowPowerTest, SetLocked) {
104  for (auto new_toggle : kAllToggles) {
105  for (auto sync_toggle : kAllToggles) {
106  EXPECT_READ32(PWRMGR_CTRL_CFG_REGWEN_REG_OFFSET,
107  AllOnesExcept(PWRMGR_CTRL_CFG_REGWEN_EN_BIT));
108 
109  EXPECT_EQ(
110  dif_pwrmgr_low_power_set_enabled(&pwrmgr_, new_toggle, sync_toggle),
111  kDifLocked);
112  }
113  }
114 }
115 
116 TEST_F(LowPowerTest, Set) {
117  for (auto new_toggle : kAllToggles) {
118  for (auto sync_toggle : kAllToggles) {
119  EXPECT_READ32(PWRMGR_CTRL_CFG_REGWEN_REG_OFFSET,
120  {{
121  .offset = PWRMGR_CTRL_CFG_REGWEN_EN_BIT,
122  .value = 1,
123  }});
124  EXPECT_MASK32(PWRMGR_CONTROL_REG_OFFSET,
125  {{
126  .offset = PWRMGR_CONTROL_LOW_POWER_HINT_BIT,
127  .mask = 1,
128  .value = (new_toggle == kDifToggleEnabled),
129  }});
130  if (sync_toggle == kDifToggleEnabled)
131  ExpectSync();
132 
133  EXPECT_DIF_OK(
134  dif_pwrmgr_low_power_set_enabled(&pwrmgr_, new_toggle, sync_toggle));
135  }
136  }
137 }
138 
139 TEST_F(LowPowerTest, GetBadArgs) {
140  dif_toggle_t state;
141 
142  EXPECT_DIF_BADARG(dif_pwrmgr_low_power_get_enabled(nullptr, &state));
143  EXPECT_DIF_BADARG(dif_pwrmgr_low_power_get_enabled(&pwrmgr_, nullptr));
144  EXPECT_DIF_BADARG(dif_pwrmgr_low_power_get_enabled(nullptr, nullptr));
145 }
146 
147 TEST_F(LowPowerTest, Get) {
148  for (auto toggle : kAllToggles) {
149  dif_toggle_t state;
150 
151  EXPECT_READ32(PWRMGR_CONTROL_REG_OFFSET,
152  {{
153  .offset = PWRMGR_CONTROL_LOW_POWER_HINT_BIT,
154  .value = (toggle == kDifToggleEnabled),
155  }});
156 
157  EXPECT_DIF_OK(dif_pwrmgr_low_power_get_enabled(&pwrmgr_, &state));
158  EXPECT_EQ(state, toggle);
159  }
160 }
161 
162 class DomainConfig : public DifPwrmgrInitialized {
163  protected:
164  /**
165  * Constants used in set and get tests.
166  */
167  static constexpr bitfield_field32_t kConfigBitfield{
168  .mask = kDifPwrmgrDomainOptionCoreClockInLowPower |
169  kDifPwrmgrDomainOptionIoClockInLowPower |
170  kDifPwrmgrDomainOptionUsbClockInLowPower |
171  kDifPwrmgrDomainOptionUsbClockInActivePower |
172  kDifPwrmgrDomainOptionMainPowerInLowPower,
173  .index = PWRMGR_CONTROL_CORE_CLK_EN_BIT,
174  };
175  static constexpr std::array<dif_pwrmgr_domain_config_t, 4> kConfigs = {
176  // All disabled.
177  0,
178  // All enabled.
179  kDifPwrmgrDomainOptionCoreClockInLowPower |
180  kDifPwrmgrDomainOptionIoClockInLowPower |
181  kDifPwrmgrDomainOptionUsbClockInLowPower |
182  kDifPwrmgrDomainOptionUsbClockInActivePower |
183  kDifPwrmgrDomainOptionMainPowerInLowPower,
184  // Some enabled.
185  kDifPwrmgrDomainOptionCoreClockInLowPower |
186  kDifPwrmgrDomainOptionUsbClockInLowPower |
187  kDifPwrmgrDomainOptionMainPowerInLowPower,
188  // Some enabled.
189  kDifPwrmgrDomainOptionIoClockInLowPower |
190  kDifPwrmgrDomainOptionUsbClockInActivePower,
191  };
192 };
193 // We need this definition for the `for` loops.
194 constexpr std::array<dif_pwrmgr_domain_config_t, 4> DomainConfig::kConfigs;
195 
196 TEST_F(DomainConfig, SetBadArgs) {
197  EXPECT_DIF_BADARG(
198  dif_pwrmgr_set_domain_config(nullptr, 0, kDifToggleEnabled));
199  EXPECT_DIF_BADARG(
200  dif_pwrmgr_set_domain_config(&pwrmgr_, kBadConfig, kDifToggleEnabled));
201  EXPECT_DIF_BADARG(dif_pwrmgr_set_domain_config(&pwrmgr_, 0, kBadToggle));
202  EXPECT_DIF_BADARG(
203  dif_pwrmgr_set_domain_config(nullptr, kBadConfig, kDifToggleEnabled));
204  EXPECT_DIF_BADARG(dif_pwrmgr_set_domain_config(nullptr, 0, kBadToggle));
205  EXPECT_DIF_BADARG(
206  dif_pwrmgr_set_domain_config(&pwrmgr_, kBadConfig, kBadToggle));
207  EXPECT_DIF_BADARG(
208  dif_pwrmgr_set_domain_config(nullptr, kBadConfig, kBadToggle));
209 }
210 
211 TEST_F(DomainConfig, SetLocked) {
212  EXPECT_READ32(PWRMGR_CTRL_CFG_REGWEN_REG_OFFSET,
213  AllOnesExcept(PWRMGR_WAKEUP_EN_REGWEN_EN_BIT));
214 
215  EXPECT_EQ(dif_pwrmgr_set_domain_config(&pwrmgr_, 0, kDifToggleEnabled),
216  kDifLocked);
217 }
218 
219 TEST_F(DomainConfig, Set) {
220  for (auto config : kConfigs) {
221  for (auto toggle : kAllToggles) {
222  EXPECT_READ32(PWRMGR_CTRL_CFG_REGWEN_REG_OFFSET,
223  {{
224  .offset = PWRMGR_CTRL_CFG_REGWEN_EN_BIT,
225  .value = 1,
226  }});
227  EXPECT_MASK32(PWRMGR_CONTROL_REG_OFFSET,
228  {{
229  .offset = kConfigBitfield.index,
230  .mask = kConfigBitfield.mask,
231  .value = config,
232  }});
233  if (toggle == kDifToggleEnabled)
234  ExpectSync();
235 
236  EXPECT_DIF_OK(dif_pwrmgr_set_domain_config(&pwrmgr_, config, toggle));
237  }
238  }
239 }
240 
241 TEST_F(DomainConfig, GetBadArgs) {
242  dif_pwrmgr_domain_config_t config;
243  EXPECT_DIF_BADARG(dif_pwrmgr_get_domain_config(nullptr, &config));
244  EXPECT_DIF_BADARG(dif_pwrmgr_get_domain_config(&pwrmgr_, nullptr));
245  EXPECT_DIF_BADARG(dif_pwrmgr_get_domain_config(nullptr, nullptr));
246 }
247 
248 TEST_F(DomainConfig, Get) {
249  for (auto exp_config : kConfigs) {
250  EXPECT_READ32(PWRMGR_CONTROL_REG_OFFSET,
251  {{
252  .offset = kConfigBitfield.index,
253  .value = exp_config,
254  }});
255 
256  dif_pwrmgr_domain_config_t act_config;
257  EXPECT_DIF_OK(dif_pwrmgr_get_domain_config(&pwrmgr_, &act_config));
258  EXPECT_EQ(act_config, exp_config);
259  }
260 }
261 
262 class RequestSources : public DifPwrmgrInitialized {
263  protected:
264  /**
265  * Constants used in set and get tests.
266  */
267  static constexpr std::array<dif_pwrmgr_request_sources_t, 2> kWakeupSources =
268  {
269  // No sources.
270  0,
271  // All sources.
272  kDifPwrmgrWakeupRequestSourceOne,
273  };
274  static constexpr std::array<dif_pwrmgr_request_sources_t, 2> kResetSources = {
275  // No sources.
276  0,
277  // All sources.
278  kDifPwrmgrResetRequestSourceOne,
279  };
280 };
281 // We need these definitions for the `for` loops.
282 constexpr std::array<dif_pwrmgr_request_sources_t, 2>
283  RequestSources::kWakeupSources;
284 constexpr std::array<dif_pwrmgr_request_sources_t, 2>
285  RequestSources::kResetSources;
286 
287 TEST_F(RequestSources, SetBadArgs) {
288  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
289  nullptr, kDifPwrmgrReqTypeWakeup, kDifPwrmgrWakeupRequestSourceOne,
290  kDifToggleEnabled));
291  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
292  &pwrmgr_, kBadReqType, kDifPwrmgrWakeupRequestSourceOne,
293  kDifToggleEnabled));
294  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
295  &pwrmgr_, kDifPwrmgrReqTypeWakeup, kBadSources, kDifToggleEnabled));
296  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
297  &pwrmgr_, kDifPwrmgrReqTypeWakeup, kDifPwrmgrWakeupRequestSourceOne,
298  kBadToggle));
299  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
300  nullptr, kBadReqType, kDifPwrmgrWakeupRequestSourceOne,
301  kDifToggleEnabled));
302  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
303  nullptr, kDifPwrmgrReqTypeWakeup, kBadSources, kDifToggleEnabled));
304  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
305  nullptr, kDifPwrmgrReqTypeWakeup, kDifPwrmgrWakeupRequestSourceOne,
306  kBadToggle));
307  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
308  &pwrmgr_, kBadReqType, kBadSources, kDifToggleEnabled));
309  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
310  &pwrmgr_, kBadReqType, kDifPwrmgrWakeupRequestSourceOne, kBadToggle));
311  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
312  &pwrmgr_, kDifPwrmgrReqTypeWakeup, kBadSources, kBadToggle));
313  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
314  nullptr, kBadReqType, kBadSources, kDifToggleEnabled));
315  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
316  nullptr, kBadReqType, kDifPwrmgrWakeupRequestSourceOne, kBadToggle));
317  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(
318  nullptr, kDifPwrmgrReqTypeWakeup, kBadSources, kBadToggle));
319  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(&pwrmgr_, kBadReqType,
320  kBadSources, kBadToggle));
321 
322  EXPECT_DIF_BADARG(dif_pwrmgr_set_request_sources(nullptr, kBadReqType,
323  kBadSources, kBadToggle));
324 }
325 
326 TEST_F(RequestSources, SetWakeupLocked) {
327  EXPECT_READ32(PWRMGR_WAKEUP_EN_REGWEN_REG_OFFSET,
328  AllOnesExcept(PWRMGR_WAKEUP_EN_REGWEN_EN_BIT));
329 
330  EXPECT_EQ(dif_pwrmgr_set_request_sources(&pwrmgr_, kDifPwrmgrReqTypeWakeup,
331  kDifPwrmgrWakeupRequestSourceOne,
332  kDifToggleEnabled),
333  kDifLocked);
334 }
335 
336 TEST_F(RequestSources, SetResetLocked) {
337  EXPECT_READ32(PWRMGR_RESET_EN_REGWEN_REG_OFFSET,
338  AllOnesExcept(PWRMGR_RESET_EN_REGWEN_EN_BIT));
339 
340  EXPECT_EQ(dif_pwrmgr_set_request_sources(&pwrmgr_, kDifPwrmgrReqTypeReset,
341  kDifPwrmgrResetRequestSourceOne,
342  kDifToggleEnabled),
343  kDifLocked);
344 }
345 
346 TEST_F(RequestSources, SetWakeup) {
347  for (auto toggle : kAllToggles) {
348  EXPECT_READ32(PWRMGR_WAKEUP_EN_REGWEN_REG_OFFSET,
349  {{
350  .offset = PWRMGR_WAKEUP_EN_REGWEN_EN_BIT,
351  .value = 1,
352  }});
353  EXPECT_WRITE32(PWRMGR_WAKEUP_EN_REG_OFFSET,
354  kDifPwrmgrWakeupRequestSourceOne);
355  if (toggle == kDifToggleEnabled)
356  ExpectSync();
357 
358  EXPECT_DIF_OK(dif_pwrmgr_set_request_sources(
359  &pwrmgr_, kDifPwrmgrReqTypeWakeup, kDifPwrmgrWakeupRequestSourceOne,
360  toggle));
361  }
362 }
363 
364 TEST_F(RequestSources, SetReset) {
365  for (auto toggle : kAllToggles) {
366  EXPECT_READ32(PWRMGR_RESET_EN_REGWEN_REG_OFFSET,
367  {{
368  .offset = PWRMGR_RESET_EN_REGWEN_EN_BIT,
369  .value = 1,
370  }});
371  EXPECT_WRITE32(PWRMGR_RESET_EN_REG_OFFSET, kDifPwrmgrResetRequestSourceOne);
372  if (toggle == kDifToggleEnabled)
373  ExpectSync();
374 
375  EXPECT_DIF_OK(dif_pwrmgr_set_request_sources(
376  &pwrmgr_, kDifPwrmgrReqTypeReset, kDifPwrmgrResetRequestSourceOne,
377  toggle));
378  }
379 }
380 
381 TEST_F(RequestSources, GetBadArgs) {
382  dif_pwrmgr_request_sources_t sources;
383 
384  EXPECT_DIF_BADARG(dif_pwrmgr_get_request_sources(
385  nullptr, kDifPwrmgrReqTypeWakeup, &sources));
386  EXPECT_DIF_BADARG(
387  dif_pwrmgr_get_request_sources(&pwrmgr_, kBadReqType, &sources));
388  EXPECT_DIF_BADARG(dif_pwrmgr_get_request_sources(
389  &pwrmgr_, kDifPwrmgrReqTypeWakeup, nullptr));
390  EXPECT_DIF_BADARG(
391  dif_pwrmgr_get_request_sources(nullptr, kBadReqType, &sources));
392  EXPECT_DIF_BADARG(dif_pwrmgr_get_request_sources(
393  nullptr, kDifPwrmgrReqTypeWakeup, nullptr));
394  EXPECT_DIF_BADARG(
395  dif_pwrmgr_get_request_sources(&pwrmgr_, kBadReqType, nullptr));
396  EXPECT_DIF_BADARG(
397  dif_pwrmgr_get_request_sources(nullptr, kBadReqType, nullptr));
398 }
399 
400 TEST_F(RequestSources, GetWakeup) {
401  for (auto exp_sources : kWakeupSources) {
402  EXPECT_READ32(PWRMGR_WAKEUP_EN_REG_OFFSET, exp_sources);
403 
404  dif_pwrmgr_request_sources_t act_sources = 0;
405  EXPECT_DIF_OK(dif_pwrmgr_get_request_sources(
406  &pwrmgr_, kDifPwrmgrReqTypeWakeup, &act_sources));
407  EXPECT_EQ(act_sources, exp_sources);
408  }
409 }
410 
411 TEST_F(RequestSources, GetReset) {
412  for (auto exp_sources : kResetSources) {
413  EXPECT_READ32(PWRMGR_RESET_EN_REG_OFFSET, exp_sources);
414 
415  dif_pwrmgr_request_sources_t act_sources = 0;
416  EXPECT_DIF_OK(dif_pwrmgr_get_request_sources(
417  &pwrmgr_, kDifPwrmgrReqTypeReset, &act_sources));
418  EXPECT_EQ(act_sources, exp_sources);
419  }
420 }
421 
422 TEST_F(RequestSources, GetCurrentBadArgs) {
423  dif_pwrmgr_request_sources_t sources;
424 
425  EXPECT_DIF_BADARG(dif_pwrmgr_get_current_request_sources(
426  nullptr, kDifPwrmgrReqTypeWakeup, &sources));
427  EXPECT_DIF_BADARG(
428  dif_pwrmgr_get_current_request_sources(&pwrmgr_, kBadReqType, &sources));
429  EXPECT_DIF_BADARG(dif_pwrmgr_get_current_request_sources(
430  &pwrmgr_, kDifPwrmgrReqTypeWakeup, nullptr));
431  EXPECT_DIF_BADARG(
432  dif_pwrmgr_get_current_request_sources(nullptr, kBadReqType, &sources));
433  EXPECT_DIF_BADARG(dif_pwrmgr_get_current_request_sources(
434  nullptr, kDifPwrmgrReqTypeWakeup, nullptr));
435  EXPECT_DIF_BADARG(
436  dif_pwrmgr_get_current_request_sources(&pwrmgr_, kBadReqType, nullptr));
437  EXPECT_DIF_BADARG(
438  dif_pwrmgr_get_current_request_sources(nullptr, kBadReqType, nullptr));
439 }
440 
441 TEST_F(RequestSources, GetCurrentWakeup) {
442  for (auto exp_sources : kWakeupSources) {
443  EXPECT_READ32(PWRMGR_WAKE_STATUS_REG_OFFSET, exp_sources);
444 
445  dif_pwrmgr_request_sources_t act_sources = 0;
446  EXPECT_DIF_OK(dif_pwrmgr_get_current_request_sources(
447  &pwrmgr_, kDifPwrmgrReqTypeWakeup, &act_sources));
448  EXPECT_EQ(act_sources, exp_sources);
449  }
450 }
451 
452 TEST_F(RequestSources, GetCurrentReset) {
453  for (auto exp_sources : kResetSources) {
454  EXPECT_READ32(PWRMGR_RESET_STATUS_REG_OFFSET, exp_sources);
455 
456  dif_pwrmgr_request_sources_t act_sources = 0;
457  EXPECT_DIF_OK(dif_pwrmgr_get_current_request_sources(
458  &pwrmgr_, kDifPwrmgrReqTypeReset, &act_sources));
459  EXPECT_EQ(act_sources, exp_sources);
460  }
461 }
462 
463 TEST_F(RequestSources, LockBadArgs) {
464  EXPECT_DIF_BADARG(
465  dif_pwrmgr_request_sources_lock(nullptr, kDifPwrmgrReqTypeWakeup));
466  EXPECT_DIF_BADARG(dif_pwrmgr_request_sources_lock(&pwrmgr_, kBadReqType));
467  EXPECT_DIF_BADARG(dif_pwrmgr_request_sources_lock(nullptr, kBadReqType));
468 }
469 
470 TEST_F(RequestSources, LockWakeup) {
471  EXPECT_WRITE32(PWRMGR_WAKEUP_EN_REGWEN_REG_OFFSET, 0);
472 
473  EXPECT_DIF_OK(
474  dif_pwrmgr_request_sources_lock(&pwrmgr_, kDifPwrmgrReqTypeWakeup));
475 }
476 
477 TEST_F(RequestSources, LockReset) {
478  EXPECT_WRITE32(PWRMGR_RESET_EN_REGWEN_REG_OFFSET, 0);
479 
480  EXPECT_DIF_OK(
481  dif_pwrmgr_request_sources_lock(&pwrmgr_, kDifPwrmgrReqTypeReset));
482 }
483 
484 TEST_F(RequestSources, IsLockedBadArgs) {
485  bool is_locked;
486 
487  EXPECT_DIF_BADARG(dif_pwrmgr_request_sources_is_locked(
488  nullptr, kDifPwrmgrReqTypeWakeup, &is_locked));
489  EXPECT_DIF_BADARG(
490  dif_pwrmgr_request_sources_is_locked(&pwrmgr_, kBadReqType, &is_locked));
491  EXPECT_DIF_BADARG(dif_pwrmgr_request_sources_is_locked(
492  &pwrmgr_, kDifPwrmgrReqTypeWakeup, nullptr));
493  EXPECT_DIF_BADARG(
494  dif_pwrmgr_request_sources_is_locked(nullptr, kBadReqType, &is_locked));
495  EXPECT_DIF_BADARG(dif_pwrmgr_request_sources_is_locked(
496  nullptr, kDifPwrmgrReqTypeWakeup, nullptr));
497  EXPECT_DIF_BADARG(
498  dif_pwrmgr_request_sources_is_locked(&pwrmgr_, kBadReqType, nullptr));
499  EXPECT_DIF_BADARG(
500  dif_pwrmgr_request_sources_is_locked(nullptr, kBadReqType, nullptr));
501 }
502 
503 TEST_F(RequestSources, IsLockedWakeup) {
504  for (auto exp_val : kAllBools) {
505  EXPECT_READ32(PWRMGR_WAKEUP_EN_REGWEN_REG_OFFSET,
506  {{
507  .offset = PWRMGR_WAKEUP_EN_REGWEN_EN_BIT,
508  .value = !exp_val,
509  }});
510 
511  bool is_locked = !exp_val;
512  EXPECT_DIF_OK(dif_pwrmgr_request_sources_is_locked(
513  &pwrmgr_, kDifPwrmgrReqTypeWakeup, &is_locked));
514  EXPECT_EQ(is_locked, exp_val);
515  }
516 }
517 
518 TEST_F(RequestSources, IsLockedReset) {
519  for (auto exp_val : kAllBools) {
520  EXPECT_READ32(PWRMGR_RESET_EN_REGWEN_REG_OFFSET,
521  {{
522  .offset = PWRMGR_RESET_EN_REGWEN_EN_BIT,
523  .value = !exp_val,
524  }});
525 
526  bool is_locked = !exp_val;
527  EXPECT_DIF_OK(dif_pwrmgr_request_sources_is_locked(
528  &pwrmgr_, kDifPwrmgrReqTypeReset, &is_locked));
529  EXPECT_EQ(is_locked, exp_val);
530  }
531 }
532 
533 class WakeupRecording : public DifPwrmgrInitialized {};
534 
535 TEST_F(WakeupRecording, SetEnabledBadArgs) {
536  EXPECT_DIF_BADARG(dif_pwrmgr_wakeup_request_recording_set_enabled(
537  nullptr, kDifToggleEnabled));
538  EXPECT_DIF_BADARG(
539  dif_pwrmgr_wakeup_request_recording_set_enabled(&pwrmgr_, kBadToggle));
540  EXPECT_DIF_BADARG(
541  dif_pwrmgr_wakeup_request_recording_set_enabled(nullptr, kBadToggle));
542 }
543 
544 TEST_F(WakeupRecording, SetEnabled) {
545  for (auto new_state : kAllToggles) {
546  EXPECT_WRITE32(PWRMGR_WAKE_INFO_CAPTURE_DIS_REG_OFFSET,
547  {{
548  .offset = PWRMGR_WAKE_INFO_CAPTURE_DIS_VAL_BIT,
549  .value = (new_state == kDifToggleDisabled),
550  }});
551 
552  EXPECT_DIF_OK(
553  dif_pwrmgr_wakeup_request_recording_set_enabled(&pwrmgr_, new_state));
554  }
555 }
556 
557 TEST_F(WakeupRecording, GetEnabledBadArgs) {
558  dif_toggle_t is_enabled;
559 
560  EXPECT_DIF_BADARG(
561  dif_pwrmgr_wakeup_request_recording_get_enabled(nullptr, &is_enabled));
562  EXPECT_DIF_BADARG(
563  dif_pwrmgr_wakeup_request_recording_get_enabled(&pwrmgr_, nullptr));
564  EXPECT_DIF_BADARG(
565  dif_pwrmgr_wakeup_request_recording_get_enabled(nullptr, nullptr));
566 }
567 
568 TEST_F(WakeupRecording, GetEnabled) {
569  for (auto exp_val : kAllToggles) {
570  EXPECT_READ32(PWRMGR_WAKE_INFO_CAPTURE_DIS_REG_OFFSET,
571  {{
572  .offset = PWRMGR_WAKE_INFO_CAPTURE_DIS_VAL_BIT,
573  .value = (exp_val == kDifToggleDisabled),
574  }});
575 
576  dif_toggle_t is_enabled =
577  (exp_val == kDifToggleEnabled) ? kDifToggleDisabled : kDifToggleEnabled;
578  EXPECT_DIF_OK(
579  dif_pwrmgr_wakeup_request_recording_get_enabled(&pwrmgr_, &is_enabled));
580  EXPECT_EQ(is_enabled, exp_val);
581  }
582 }
583 
584 TEST_F(WakeupRecording, GetReasonBadArgs) {
585  dif_pwrmgr_wakeup_reason_t wakeup_reason;
586 
587  EXPECT_DIF_BADARG(dif_pwrmgr_wakeup_reason_get(nullptr, &wakeup_reason));
588  EXPECT_DIF_BADARG(dif_pwrmgr_wakeup_reason_get(&pwrmgr_, nullptr));
589  EXPECT_DIF_BADARG(dif_pwrmgr_wakeup_reason_get(nullptr, nullptr));
590 }
591 
592 /**
593  * Custom equality matcher for `dif_pwrmgr_wakeup_reason_t`s.
594  */
595 testing::Matcher<dif_pwrmgr_wakeup_reason_t> Eq(
596  const dif_pwrmgr_wakeup_reason_t &rhs) {
597  return testing::AllOf(
598  testing::Field("types", &dif_pwrmgr_wakeup_reason_t::types, rhs.types),
599  testing::Field("request_sources",
600  &dif_pwrmgr_wakeup_reason_t::request_sources,
601  rhs.request_sources));
602 }
603 
604 TEST_F(WakeupRecording, GetReason) {
605  struct TestCase {
606  /**
607  * Value that will be read from hardware.
608  */
609  std::initializer_list<mock_mmio::BitField> read_val;
610  /**
611  * Expected output.
612  */
613  dif_pwrmgr_wakeup_reason_t exp_output;
614  };
615 
616  std::array<TestCase, 10> test_cases = {{
617  // No bits set.
618  {
619  .read_val = {{
620  .offset = 0,
621  .value = 0,
622  }},
623  .exp_output =
624  {
625  .types = 0,
626  .request_sources = 0,
627  },
628  },
629  // All bits set.
630  {
631  .read_val = {{
632  .offset = PWRMGR_WAKE_INFO_ABORT_BIT,
633  .value = 1,
634  },
635  {
636  .offset = PWRMGR_WAKE_INFO_FALL_THROUGH_BIT,
637  .value = 1,
638  },
639  {
640  .offset = PWRMGR_PARAM_SYSRST_CTRL_AON_WKUP_REQ_IDX,
641  .value = 1,
642  },
643  {
644  .offset = PWRMGR_PARAM_ADC_CTRL_AON_WKUP_REQ_IDX,
645  .value = 1,
646  },
647  {
648  .offset = PWRMGR_PARAM_PINMUX_AON_PIN_WKUP_REQ_IDX,
649  .value = 1,
650  },
651  {
652  .offset = PWRMGR_PARAM_PINMUX_AON_USB_WKUP_REQ_IDX,
653  .value = 1,
654  },
655  {
656  .offset = PWRMGR_PARAM_AON_TIMER_AON_WKUP_REQ_IDX,
657  .value = 1,
658  },
659  {
660  .offset = PWRMGR_PARAM_SENSOR_CTRL_AON_WKUP_REQ_IDX,
661  .value = 1,
662  }},
663  .exp_output = {.types = kDifPwrmgrWakeupTypeAbort |
664  kDifPwrmgrWakeupTypeFallThrough |
665  kDifPwrmgrWakeupTypeRequest,
666  .request_sources = kDifPwrmgrWakeupRequestSourceOne |
667  kDifPwrmgrWakeupRequestSourceTwo |
668  kDifPwrmgrWakeupRequestSourceThree |
669  kDifPwrmgrWakeupRequestSourceFour |
670  kDifPwrmgrWakeupRequestSourceFive |
671  kDifPwrmgrWakeupRequestSourceSix},
672  },
673  // Only abort.
674  {
675  .read_val = {{
676  .offset = PWRMGR_WAKE_INFO_ABORT_BIT,
677  .value = 1,
678  }},
679  .exp_output =
680  {
681  .types = kDifPwrmgrWakeupTypeAbort,
682  .request_sources = 0,
683  },
684  },
685  // Only fall-through.
686  {
687  .read_val = {{
688  .offset = PWRMGR_WAKE_INFO_FALL_THROUGH_BIT,
689  .value = 1,
690  }},
691  .exp_output =
692  {
693  .types = kDifPwrmgrWakeupTypeFallThrough,
694  .request_sources = 0,
695  },
696  },
697  // Only requests from peripherals.
698  {
699  .read_val = {{
700  .offset = PWRMGR_PARAM_SYSRST_CTRL_AON_WKUP_REQ_IDX,
701  .value = 1,
702  }},
703  .exp_output =
704  {
705  .types = kDifPwrmgrWakeupTypeRequest,
706  .request_sources = kDifPwrmgrWakeupRequestSourceOne,
707  },
708  },
709  {
710  .read_val = {{
711  .offset = PWRMGR_PARAM_ADC_CTRL_AON_WKUP_REQ_IDX,
712  .value = 1,
713  }},
714  .exp_output =
715  {
716  .types = kDifPwrmgrWakeupTypeRequest,
717  .request_sources = kDifPwrmgrWakeupRequestSourceTwo,
718  },
719  },
720  {
721  .read_val = {{
722  .offset = PWRMGR_PARAM_PINMUX_AON_PIN_WKUP_REQ_IDX,
723  .value = 1,
724  }},
725  .exp_output =
726  {
727  .types = kDifPwrmgrWakeupTypeRequest,
728  .request_sources = kDifPwrmgrWakeupRequestSourceThree,
729  },
730  },
731  {
732  .read_val = {{
733  .offset = PWRMGR_PARAM_PINMUX_AON_USB_WKUP_REQ_IDX,
734  .value = 1,
735  }},
736  .exp_output =
737  {
738  .types = kDifPwrmgrWakeupTypeRequest,
739  .request_sources = kDifPwrmgrWakeupRequestSourceFour,
740  },
741  },
742  {
743  .read_val = {{
744  .offset = PWRMGR_PARAM_AON_TIMER_AON_WKUP_REQ_IDX,
745  .value = 1,
746  }},
747  .exp_output =
748  {
749  .types = kDifPwrmgrWakeupTypeRequest,
750  .request_sources = kDifPwrmgrWakeupRequestSourceFive,
751  },
752  },
753  {
754  .read_val = {{
755  .offset = PWRMGR_PARAM_SENSOR_CTRL_AON_WKUP_REQ_IDX,
756  .value = 1,
757  }},
758  .exp_output =
759  {
760  .types = kDifPwrmgrWakeupTypeRequest,
761  .request_sources = kDifPwrmgrWakeupRequestSourceSix,
762  },
763  },
764  }};
765 
766  for (const auto &test_case : test_cases) {
767  EXPECT_READ32(PWRMGR_WAKE_INFO_REG_OFFSET, test_case.read_val);
768 
769  dif_pwrmgr_wakeup_reason_t wakeup_reason;
770  EXPECT_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr_, &wakeup_reason));
771  EXPECT_THAT(wakeup_reason, Eq(test_case.exp_output));
772  }
773 }
774 
775 TEST_F(WakeupRecording, ClearReasonBadArgs) {
776  EXPECT_DIF_BADARG(dif_pwrmgr_wakeup_reason_clear(nullptr));
777 }
778 
779 TEST_F(WakeupRecording, ClearReason) {
780  EXPECT_WRITE32(PWRMGR_WAKE_INFO_REG_OFFSET,
781  std::numeric_limits<uint32_t>::max());
782 
783  EXPECT_DIF_OK(dif_pwrmgr_wakeup_reason_clear(&pwrmgr_));
784 }
785 
786 class FatalErrorTest : public DifPwrmgrInitialized {};
787 
788 TEST_F(FatalErrorTest, GetBadArgs) {
789  dif_pwrmgr_fatal_err_codes_t codes;
790  EXPECT_DIF_BADARG(dif_pwrmgr_fatal_err_code_get_codes(nullptr, nullptr));
791  EXPECT_DIF_BADARG(dif_pwrmgr_fatal_err_code_get_codes(nullptr, &codes));
792  EXPECT_DIF_BADARG(dif_pwrmgr_fatal_err_code_get_codes(&pwrmgr_, nullptr));
793 }
794 
795 TEST_F(FatalErrorTest, GetCodes) {
796  dif_pwrmgr_fatal_err_codes_t codes;
797  EXPECT_READ32(PWRMGR_FAULT_STATUS_REG_OFFSET, 6);
798  EXPECT_DIF_OK(dif_pwrmgr_fatal_err_code_get_codes(&pwrmgr_, &codes));
799  EXPECT_EQ(codes, 6);
800 }
801 
802 } // namespace
803 } // namespace dif_pwrmgr_unittest
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