Software APIs
dif_pattgen.h
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1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 #ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_PATTGEN_H_
6 #define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_PATTGEN_H_
7 
8 /**
9  * @file
10  * @brief <a href="/hw/ip/pattgen/doc/">Pattern Generator</a> Device Interface
11  * Functions
12  */
13 
14 #include <stdint.h>
15 
17 
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif // __cplusplus
23 
24 /**
25  * Helper X macro for defining enums and case statements related to Pattern
26  * Generator channels. If an additional channel is ever added to the hardware,
27  * this list can be updated.
28  */
29 #define DIF_PATTGEN_CHANNEL_LIST(X) \
30  X(0) \
31  X(1)
32 
33 /**
34  * Helper macro for defining a `dif_pattgen_channel_t` enumeration constant.
35  * @channel_ Pattern Generator channel of the enumeration constant.
36  */
37 #define PATTGEN_CHANNEL_ENUM_INIT_(channel_) \
38  kDifPattgenChannel##channel_ = channel_,
39 
40 /**
41  * A Pattern Generator channel.
42  */
43 typedef enum dif_pattgen_channel {
46 
47 #undef PATTGEN_CHANNEL_ENUM_INIT_
48 
49 /**
50  * The polarity of a Pattern Generator channel.
51  */
52 typedef enum dif_pattgen_polarity {
53  /**
54  * Low polarity indicates the output data signal (PDA) changes on a falling
55  * output clock (PCL) edge.
56  */
58  /**
59  * High polarity indicates the output data signal (PDA) changes on a rising
60  * output clock (PCL) edge.
61  */
63  /**
64  * Number of polarity values, used for argument validation.
65  */
68 
69 /**
70  * Runtime configuration for a Pattern Generator channel.
71  */
73  /**
74  * The polarity of the channel.
75  */
77  /**
78  * The I/O clock divisor that determines the frequency of channel's clock.
79  *
80  * Specifically, the output clock frequency (f_pcl) is computed from the I/O
81  * clock frequency (f_io_clk):
82  *
83  * f_pcl = f_io_clk / (2 * (clock_divisor + 1))
84  */
85  uint32_t clock_divisor;
86  /**
87  * The lower 32-bits of the seed pattern.
88  *
89  * Some bits may go unused depending on the value of `seed_pattern_length`.
90  */
92  /**
93  * The upper 32-bits of the seed pattern.
94  *
95  * Some, or all, bits may go unused depending on the value of
96  * `seed_pattern_length`.
97  */
99  /**
100  * The length of the seed pattern.
101  *
102  * Units: bits
103  * Valid range: [1, 64]
104  */
106  /**
107  * The number of times to repeat the pattern.
108  *
109  * Valid range: [1, 1024]
110  */
113 
114 /**
115  * Configures a Pattern Generator channel.
116  *
117  * This should be called once for each channel to be configured.
118  *
119  * Since writes to channel configuration registers have no effect when the
120  * channel is enabled, this function will return `kDifError` if the channel is
121  * enabled.
122  *
123  * @param pattgen A Pattern Generator handle.
124  * @param channel The channel to configure.
125  * @param config Runtime configuration parameters.
126  * @return The result of the operation.
127  */
130  dif_pattgen_channel_t channel,
132 
133 /**
134  * Sets the enablement state of a Pattern Generator channel.
135  *
136  * @param pattgen A Pattern Generator handle.
137  * @param channel The channel to set the enablement state of.
138  * @param enabled The enablement state to configure the channel in.
139  * @return The result of the operation.
140  */
143  dif_pattgen_channel_t channel,
144  dif_toggle_t enabled);
145 
146 /**
147  * Gets the enablement state of a Pattern Generator channel.
148  *
149  * @param pattgen A Pattern Generator handle.
150  * @param channel The channel to get the enablement state of.
151  * @param[out] is_enabled The enablement state of the channel.
152  * @return The result of the operation.
153  */
156  dif_pattgen_channel_t channel,
157  dif_toggle_t *is_enabled);
158 
159 #ifdef __cplusplus
160 } // extern "C"
161 #endif // __cplusplus
162 
163 #endif // OPENTITAN_SW_DEVICE_LIB_DIF_DIF_PATTGEN_H_