Software APIs
dif_otbn.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_OTBN_H_
6#define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_OTBN_H_
7
8/**
9 * @file
10 * @brief <a href="/book/hw/ip/otbn/">OTBN</a> Device Interface Functions.
11 */
12
13#include <stddef.h>
14#include <stdint.h>
15
18
19#include "sw/device/lib/dif/autogen/dif_otbn_autogen.h"
20
21#ifdef __cplusplus
22extern "C" {
23#endif // __cplusplus
24
25/**
26 * OTBN commands.
27 */
28typedef enum dif_otbn_cmd {
29 kDifOtbnCmdExecute = 0xd8,
30 kDifOtbnCmdSecWipeDmem = 0xc3,
31 kDifOtbnCmdSecWipeImem = 0x1e,
32 kDifOtbnCmdResume = 0xa6,
34
35/**
36 * OTBN status.
37 */
38typedef enum dif_otbn_status {
39 kDifOtbnStatusIdle = 0x00,
40 kDifOtbnStatusBusyExecute = 0x01,
41 kDifOtbnStatusBusySecWipeDmem = 0x02,
42 kDifOtbnStatusBusySecWipeImem = 0x03,
43 kDifOtbnStatusBusySecWipeInt = 0x04,
44 kDifOtbnStatusPaused = 0x05,
45 kDifOtbnStatusLocked = 0xFF,
47
48/**
49 * OTBN Errors.
50 *
51 * OTBN uses a bitfield to indicate which errors have been seen. Multiple errors
52 * can be seen at the same time. This enum gives the individual bits that may be
53 * set for different errors.
54 */
55typedef enum dif_otbn_err_bits {
56 kDifOtbnErrBitsNoError = 0,
57 /** A BAD_DATA_ADDR error was observed. */
59 /** A BAD_INSN_ADDR error was observed. */
61 /** A CALL_STACK error was observed. */
63 /** An ILLEGAL_INSN error was observed. */
65 /** A LOOP error was observed. */
67 /** A RND_FIPS_CHECK_FAIL error was observed. */
69 /** A IMEM_INTG_VIOLATION error was observed. */
71 /** A DMEM_INTG_VIOLATION error was observed. */
73 /** A REG_INTG_VIOLATION error was observed. */
75 /** A BUS_INTG_VIOLATION error was observed. */
77 /** A BAD_INTERNAL_STATE error was observed. */
79 /** An ILLEGAL_BUS_ACCESS error was observed. */
81 /** A LIFECYCLE_ESCALATION error was observed. */
83 /** A FATAL_SOFTWARE error was observed. */
86
87/**
88 * Reset OTBN device.
89 *
90 * Resets the given OTBN device by setting its configuration registers to
91 * reset values. Disables interrupts, output, and input filter.
92 *
93 * @param otbn OTBN instance.
94 * @return The result of the operation.
95 */
98
99/**
100 * Start an operation by issuing a command.
101 *
102 * @param otbn OTBN instance.
103 * @param cmd The command.
104 * @return The result of the operation.
105 */
108
109/**
110 * Gets the current status of OTBN.
111 *
112 * @param otbn OTBN instance.
113 * @param[out] status OTBN status.
114 * @return The result of the operation.
115 */
119
120/**
121 * Get the error bits set by the device if the operation failed.
122 *
123 * @param otbn OTBN instance.
124 * @param[out] err_bits The error bits returned by the hardware.
125 * @return The result of the operation.
126 */
129 dif_otbn_err_bits_t *err_bits);
130
131/**
132 * Gets the number of executed OTBN instructions.
133 *
134 * Gets the number of instructions executed so far in the current OTBN run if
135 * there is one. Otherwise, gets the number executed in total in the previous
136 * OTBN run.
137 *
138 * @param otbn OTBN instance.
139 * @param[out] insn_cnt The number of instructions executed by OTBN.
140 * @return The result of the operation.
141 */
143dif_result_t dif_otbn_get_insn_cnt(const dif_otbn_t *otbn, uint32_t *insn_cnt);
144
145/**
146 * Gets the content of the load checksum register.
147 *
148 * Gets the 32-bit CRC checksum of data written to memory.
149 *
150 * @param otbn OTBN instance.
151 * @param[out] insn_cnt The number of instructions executed by OTBN.
152 * @return The result of the operation.
153 */
156 uint32_t *insn_cnt);
157
158/**
159 * Clears the load checksum register.
160 *
161 * Writes 0 to the load checksum register to clear it.
162 *
163 * @param otbn OTBN instance.
164 * @return The result of the operation.
165 */
168
169/**
170 * Write an OTBN application into its instruction memory (IMEM).
171 *
172 * Only 32b-aligned 32b word accesses are allowed.
173 *
174 * @param otbn OTBN instance.
175 * @param offset_bytes the byte offset in IMEM the first word is written to.
176 * @param src the main memory location to start reading from.
177 * @param len_bytes number of bytes to copy.
178 * @return The result of the operation.
179 */
181dif_result_t dif_otbn_imem_write(const dif_otbn_t *otbn, uint32_t offset_bytes,
182 const void *src, size_t len_bytes);
183
184/**
185 * Read from OTBN's instruction memory (IMEM).
186 *
187 * Only 32b-aligned 32b word accesses are allowed.
188 *
189 * @param otbn OTBN instance
190 * @param offset_bytes the byte offset in IMEM the first word is read from.
191 * @param[out] dest the main memory location to copy the data to (preallocated).
192 * @param len_bytes number of bytes to copy.
193 * @return The result of the operation.
194 */
196dif_result_t dif_otbn_imem_read(const dif_otbn_t *otbn, uint32_t offset_bytes,
197 void *dest, size_t len_bytes);
198
199/**
200 * Write to OTBN's data memory (DMEM).
201 *
202 * Only 32b-aligned 32b word accesses are allowed.
203 *
204 * @param otbn OTBN instance.
205 * @param offset_bytes the byte offset in DMEM the first word is written to.
206 * @param src the main memory location to start reading from.
207 * @param len_bytes number of bytes to copy.
208 * @return The result of the operation.
209 */
211dif_result_t dif_otbn_dmem_write(const dif_otbn_t *otbn, uint32_t offset_bytes,
212 const void *src, size_t len_bytes);
213
214/**
215 * Read from OTBN's data memory (DMEM).
216 *
217 * Only 32b-aligned 32b word accesses are allowed.
218 *
219 * @param otbn OTBN instance
220 * @param offset_bytes the byte offset in DMEM the first word is read from.
221 * @param[out] dest the main memory location to copy the data to (preallocated).
222 * @param len_bytes number of bytes to copy.
223 * @return The result of the operation.
224 */
226dif_result_t dif_otbn_dmem_read(const dif_otbn_t *otbn, uint32_t offset_bytes,
227 void *dest, size_t len_bytes);
228
229/**
230 * Sets the software errors are fatal bit in the control register.
231 *
232 * When set any software error becomes a fatal error. The bit can only be
233 * changed when the OTBN status is IDLE.
234 *
235 * @param otbn OTBN instance.
236 * @param enable Enable or disable whether software errors are fatal.
237 * @return The result of the operation, `kDifUnavailable` is returned when the
238 * requested change cannot be made.
239 */
242 bool enable);
243
244/**
245 * Sets the WFI enabled bit in the control register.
246 *
247 * When set, OTBN software may use the WFI instruction to pause execution and
248 * hand control back to the host until it issues a RESUME command.
249 * When cleared, the WFI instruction raises an `ILLEGAL_INSN` error. The bit can
250 * only be changed when the OTBN status is IDLE.
251 *
252 * @param otbn OTBN instance.
253 * @param enable Enable or disable the WFI instruction.
254 * @return The result of the operation, `kDifUnavailable` is returned when the
255 * requested change cannot be made.
256 */
259
260/**
261 * Get the size of OTBN's data memory in bytes.
262 *
263 * @param otbn OTBN instance.
264 * @return data memory size in bytes.
265 */
266size_t dif_otbn_get_dmem_size_bytes(const dif_otbn_t *otbn);
267
268/**
269 * Get the size of OTBN's instruction memory in bytes.
270 *
271 * @param otbn OTBN instance.
272 * @return instruction memory size in bytes.
273 */
274size_t dif_otbn_get_imem_size_bytes(const dif_otbn_t *otbn);
275
276#ifdef __cplusplus
277} // extern "C"
278#endif // __cplusplus
279
280#endif // OPENTITAN_SW_DEVICE_LIB_DIF_DIF_OTBN_H_