Software APIs
dif_mbx_autogen.c
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
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11// THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
12// util/autogen_dif.py -i hw/ip/mbx/data/mbx.hjson -o
13// bazel-out/k8-fastbuild-ST-24cc6a2908d2/bin/sw/device/lib/dif/autogen
14
15
16#include <stdint.h>
17
18#include "sw/device/lib/dif/dif_base.h"
19#include "sw/device/lib/dif/autogen/dif_mbx_autogen.h"
20
21#include "hw/top/mbx_regs.h" // Generated.
22
23
24OT_WARN_UNUSED_RESULT
25dif_result_t dif_mbx_init(
26 mmio_region_t base_addr,
27 dif_mbx_t *mbx) {
28 if (mbx == NULL) {
29 return kDifBadArg;
30 }
31
32 mbx->dt = kDtMbxCount;
33 mbx->base_addr = base_addr;
34
35 return kDifOk;
36}
37
38OT_WARN_UNUSED_RESULT
39dif_result_t dif_mbx_init_from_dt(
40 dt_mbx_t dt,
41 dif_mbx_t *mbx) {
42 if (mbx == NULL) {
43 return kDifBadArg;
44 }
45
46 mbx->dt = dt;
47 mbx->base_addr = mmio_region_from_addr(dt_mbx_primary_reg_block(dt));
48
49 return kDifOk;
50}
51
52dif_result_t dif_mbx_get_dt(
53 const dif_mbx_t *mbx,
54 dt_mbx_t *dt) {
55 if ((int)mbx->dt == kDtMbxCount || dt == NULL) {
56 return kDifBadArg;
57 }
58 *dt = mbx->dt;
59 return kDifOk;
60}
61
62 dif_result_t dif_mbx_alert_force(
63 const dif_mbx_t *mbx,
64 dif_mbx_alert_t alert) {
65 if (mbx == NULL) {
66 return kDifBadArg;
67 }
68
69 bitfield_bit32_index_t alert_idx;
70 switch (alert) {
71 case kDifMbxAlertFatalFault:
72 alert_idx = MBX_ALERT_TEST_FATAL_FAULT_BIT;
73 break;
74 case kDifMbxAlertRecovFault:
75 alert_idx = MBX_ALERT_TEST_RECOV_FAULT_BIT;
76 break;
77 default:
78 return kDifBadArg;
79 }
80
81 uint32_t alert_test_reg = bitfield_bit32_write(0, alert_idx, true);
82 // Keep the alert test enabled: writing 0 to the regwen bit locks the register.
83 alert_test_reg = bitfield_bit32_write(
84 alert_test_reg, MBX_ALERT_TEST_REGWEN_BIT, true);
85 mmio_region_write32(
86 mbx->base_addr,
87 (ptrdiff_t)MBX_ALERT_TEST_REG_OFFSET,
88 alert_test_reg);
89
90
91 return kDifOk;
92}
93
94
95 /**
96 * Get the corresponding interrupt register bit offset of the IRQ.
97 */
98 static bool mbx_get_irq_bit_index(
99 dif_mbx_irq_t irq,
100 bitfield_bit32_index_t *index_out) {
101
102 switch (irq) {
103 case kDtMbxIrqMbxReady:
104 *index_out = MBX_INTR_COMMON_MBX_READY_BIT;
105 break;
106 case kDtMbxIrqMbxAbort:
107 *index_out = MBX_INTR_COMMON_MBX_ABORT_BIT;
108 break;
109 case kDtMbxIrqMbxError:
110 *index_out = MBX_INTR_COMMON_MBX_ERROR_BIT;
111 break;
112 default:
113 return false;
114 }
115
116 return true;
117 }
118
119 static dif_irq_type_t irq_types[] = {
120 kDifIrqTypeEvent,
121 kDifIrqTypeEvent,
122 kDifIrqTypeEvent,
123 };
124
125 OT_WARN_UNUSED_RESULT
126 dif_result_t dif_mbx_irq_get_type(
127 const dif_mbx_t *mbx,
128 dif_mbx_irq_t irq,
129 dif_irq_type_t *type) {
130
131
132 if (mbx == NULL ||
133 type == NULL ||
134 irq < kDifMbxIrqMbxReady ||
135 irq > kDifMbxIrqMbxError) {
136 return kDifBadArg;
137 }
138
139 *type = irq_types[irq];
140
141 return kDifOk;
142 }
143
144 OT_WARN_UNUSED_RESULT
145 dif_result_t dif_mbx_irq_get_state(
146 const dif_mbx_t *mbx,
147 dif_mbx_irq_state_snapshot_t *snapshot) {
148
149 if (mbx == NULL || snapshot == NULL) {
150 return kDifBadArg;
151 }
152
153 *snapshot = mmio_region_read32(
154 mbx->base_addr,
155 (ptrdiff_t)MBX_INTR_STATE_REG_OFFSET);
156
157
158 return kDifOk;
159 }
160
161 OT_WARN_UNUSED_RESULT
162 dif_result_t dif_mbx_irq_acknowledge_state(
163 const dif_mbx_t *mbx,
164 dif_mbx_irq_state_snapshot_t snapshot) {
165 if (mbx == NULL) {
166 return kDifBadArg;
167 }
168
169 mmio_region_write32(
170 mbx->base_addr,
171 (ptrdiff_t)MBX_INTR_STATE_REG_OFFSET,
172 snapshot);
173
174
175 return kDifOk;
176 }
177
178 OT_WARN_UNUSED_RESULT
179 dif_result_t dif_mbx_irq_is_pending(
180 const dif_mbx_t *mbx,
181 dif_mbx_irq_t irq,
182 bool *is_pending) {
183
184 if (mbx == NULL || is_pending == NULL) {
185 return kDifBadArg;
186 }
187
188 bitfield_bit32_index_t index;
189 if (!mbx_get_irq_bit_index(irq, &index)) {
190 return kDifBadArg;
191 }
192
193 uint32_t intr_state_reg = mmio_region_read32(
194 mbx->base_addr,
195 (ptrdiff_t)MBX_INTR_STATE_REG_OFFSET);
196
197
198 *is_pending = bitfield_bit32_read(intr_state_reg, index);
199
200 return kDifOk;
201 }
202
203 OT_WARN_UNUSED_RESULT
204 dif_result_t dif_mbx_irq_acknowledge_all(
205 const dif_mbx_t *mbx
206 ) {
207
208 if (mbx == NULL) {
209 return kDifBadArg;
210 }
211
212 // Writing to the register clears the corresponding bits (Write-one clear).
213 mmio_region_write32(
214 mbx->base_addr,
215 (ptrdiff_t)MBX_INTR_STATE_REG_OFFSET,
216 UINT32_MAX);
217
218
219 return kDifOk;
220 }
221
222 OT_WARN_UNUSED_RESULT
223 dif_result_t dif_mbx_irq_acknowledge(
224 const dif_mbx_t *mbx,
225 dif_mbx_irq_t irq) {
226
227 if (mbx == NULL) {
228 return kDifBadArg;
229 }
230
231 bitfield_bit32_index_t index;
232 if (!mbx_get_irq_bit_index(irq, &index)) {
233 return kDifBadArg;
234 }
235
236 // Writing to the register clears the corresponding bits (Write-one clear).
237 uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
238 mmio_region_write32(
239 mbx->base_addr,
240 (ptrdiff_t)MBX_INTR_STATE_REG_OFFSET,
241 intr_state_reg);
242
243
244 return kDifOk;
245 }
246
247 OT_WARN_UNUSED_RESULT
248 dif_result_t dif_mbx_irq_force(
249 const dif_mbx_t *mbx,
250 dif_mbx_irq_t irq,
251 const bool val) {
252
253 if (mbx == NULL) {
254 return kDifBadArg;
255 }
256
257 bitfield_bit32_index_t index;
258 if (!mbx_get_irq_bit_index(irq, &index)) {
259 return kDifBadArg;
260 }
261
262 uint32_t intr_test_reg = bitfield_bit32_write(0, index, val);
263 mmio_region_write32(
264 mbx->base_addr,
265 (ptrdiff_t)MBX_INTR_TEST_REG_OFFSET,
266 intr_test_reg);
267
268
269 return kDifOk;
270 }
271
272 OT_WARN_UNUSED_RESULT
273 dif_result_t dif_mbx_irq_get_enabled(
274 const dif_mbx_t *mbx,
275 dif_mbx_irq_t irq,
276 dif_toggle_t *state) {
277
278 if (mbx == NULL || state == NULL) {
279 return kDifBadArg;
280 }
281
282 bitfield_bit32_index_t index;
283 if (!mbx_get_irq_bit_index(irq, &index)) {
284 return kDifBadArg;
285 }
286
287 uint32_t intr_enable_reg = mmio_region_read32(
288 mbx->base_addr,
289 (ptrdiff_t)MBX_INTR_ENABLE_REG_OFFSET);
290
291
292 bool is_enabled = bitfield_bit32_read(intr_enable_reg, index);
293 *state = is_enabled ?
294 kDifToggleEnabled : kDifToggleDisabled;
295
296 return kDifOk;
297 }
298
299 OT_WARN_UNUSED_RESULT
300 dif_result_t dif_mbx_irq_set_enabled(
301 const dif_mbx_t *mbx,
302 dif_mbx_irq_t irq,
303 dif_toggle_t state) {
304
305 if (mbx == NULL) {
306 return kDifBadArg;
307 }
308
309 bitfield_bit32_index_t index;
310 if (!mbx_get_irq_bit_index(irq, &index)) {
311 return kDifBadArg;
312 }
313
314 uint32_t intr_enable_reg = mmio_region_read32(
315 mbx->base_addr,
316 (ptrdiff_t)MBX_INTR_ENABLE_REG_OFFSET);
317
318
319 bool enable_bit = (state == kDifToggleEnabled) ? true : false;
320 intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
321 mmio_region_write32(
322 mbx->base_addr,
323 (ptrdiff_t)MBX_INTR_ENABLE_REG_OFFSET,
324 intr_enable_reg);
325
326
327 return kDifOk;
328 }
329
330 OT_WARN_UNUSED_RESULT
331 dif_result_t dif_mbx_irq_disable_all(
332 const dif_mbx_t *mbx,
333 dif_mbx_irq_enable_snapshot_t *snapshot) {
334
335 if (mbx == NULL) {
336 return kDifBadArg;
337 }
338
339 // Pass the current interrupt state to the caller, if requested.
340 if (snapshot != NULL) {
341 *snapshot = mmio_region_read32(
342 mbx->base_addr,
343 (ptrdiff_t)MBX_INTR_ENABLE_REG_OFFSET);
344
345 }
346
347 // Disable all interrupts.
348 mmio_region_write32(
349 mbx->base_addr,
350 (ptrdiff_t)MBX_INTR_ENABLE_REG_OFFSET,
351 0u);
352
353
354 return kDifOk;
355 }
356
357 OT_WARN_UNUSED_RESULT
358 dif_result_t dif_mbx_irq_restore_all(
359 const dif_mbx_t *mbx,
360 const dif_mbx_irq_enable_snapshot_t *snapshot) {
361
362 if (mbx == NULL || snapshot == NULL) {
363 return kDifBadArg;
364 }
365
366 mmio_region_write32(
367 mbx->base_addr,
368 (ptrdiff_t)MBX_INTR_ENABLE_REG_OFFSET,
369 *snapshot);
370
371
372 return kDifOk;
373 }
374