104 uint32_t reg = mmio_region_read32(hmac->
base_addr, HMAC_CFG_REG_OFFSET);
114 for (
size_t i = 0; i < 8; ++i) {
115 const ptrdiff_t word_offset = (ptrdiff_t)(i *
sizeof(uint32_t));
116 mmio_region_write32(hmac->
base_addr, HMAC_KEY_7_REG_OFFSET - word_offset,
117 read_32((
char *)key + word_offset));
122 reg = bitfield_bit32_write(reg, HMAC_CFG_SHA_EN_BIT,
true);
123 reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT,
true);
126 reg = bitfield_field32_write(reg, HMAC_CFG_DIGEST_SIZE_FIELD,
127 HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256);
128 reg = bitfield_field32_write(reg, HMAC_CFG_KEY_LENGTH_FIELD,
129 HMAC_CFG_KEY_LENGTH_VALUE_KEY_256);
131 mmio_region_write32(hmac->
base_addr, HMAC_CFG_REG_OFFSET, reg);
134 mmio_region_nonatomic_set_bit32(hmac->
base_addr, HMAC_CMD_REG_OFFSET,
135 HMAC_CMD_HASH_START_BIT);
146 uint32_t reg = mmio_region_read32(hmac->
base_addr, HMAC_CFG_REG_OFFSET);
152 reg = bitfield_bit32_write(reg, HMAC_CFG_SHA_EN_BIT,
true);
153 reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT,
false);
156 reg = bitfield_field32_write(reg, HMAC_CFG_DIGEST_SIZE_FIELD,
157 HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256);
158 reg = bitfield_field32_write(reg, HMAC_CFG_KEY_LENGTH_FIELD,
159 HMAC_CFG_KEY_LENGTH_VALUE_KEY_256);
162 mmio_region_write32(hmac->
base_addr, HMAC_CFG_REG_OFFSET, reg);
165 mmio_region_nonatomic_set_bit32(hmac->
base_addr, HMAC_CMD_REG_OFFSET,
166 HMAC_CMD_HASH_START_BIT);
172 size_t len,
size_t *bytes_sent) {
173 if (hmac == NULL || data == NULL) {
177 const uint8_t *data_sent = (
const uint8_t *)data;
178 size_t bytes_remaining = len;
180 while (bytes_remaining > 0 && get_fifo_available_space(hmac) > 0) {
181 bool word_aligned = (uintptr_t)data_sent %
sizeof(uint32_t) == 0;
182 size_t bytes_written = 0;
184 if (bytes_remaining <
sizeof(uint32_t) || !word_aligned) {
187 mmio_region_write8(hmac->
base_addr, HMAC_MSG_FIFO_REG_OFFSET, *data_sent);
191 uint32_t word = read_32(data_sent);
192 mmio_region_write32(hmac->
base_addr, HMAC_MSG_FIFO_REG_OFFSET, word);
193 bytes_written =
sizeof(uint32_t);
196 bytes_remaining -= bytes_written;
197 data_sent += bytes_written;
200 if (bytes_sent != NULL) {
201 *bytes_sent = len - bytes_remaining;
204 if (bytes_remaining > 0) {
224 if (hmac == NULL || msg_len == NULL) {
228 mmio_region_read32(hmac->
base_addr, HMAC_MSG_LENGTH_LOWER_REG_OFFSET);
230 mmio_region_read32(hmac->
base_addr, HMAC_MSG_LENGTH_UPPER_REG_OFFSET);
232 *msg_len = (msg_upper << 32) | msg_lower;
261 if (hmac == NULL || digest == NULL) {
266 bool done = mmio_region_get_bit32(hmac->
base_addr, HMAC_INTR_STATE_REG_OFFSET,
267 HMAC_INTR_STATE_HMAC_DONE_BIT);
270 bool fifo_empty = mmio_region_get_bit32(
271 hmac->
base_addr, HMAC_STATUS_REG_OFFSET, HMAC_STATUS_FIFO_EMPTY_BIT);
274 mmio_region_get_bit32(hmac->
base_addr, HMAC_INTR_STATE_REG_OFFSET,
275 HMAC_INTR_STATE_HMAC_ERR_BIT);
284 mmio_region_nonatomic_set_bit32(hmac->
base_addr, HMAC_INTR_STATE_REG_OFFSET,
285 HMAC_INTR_STATE_HMAC_DONE_BIT);
286 }
else if (!fifo_empty) {
290 read_digest(hmac, digest);
292 if (disable_after_done) {
295 uint32_t device_config =
296 mmio_region_read32(hmac->
base_addr, HMAC_CFG_REG_OFFSET);
298 bitfield_bit32_write(device_config, HMAC_CFG_SHA_EN_BIT,
false);
300 bitfield_bit32_write(device_config, HMAC_CFG_HMAC_EN_BIT,
false);
302 bitfield_field32_write(device_config, HMAC_CFG_DIGEST_SIZE_FIELD,
303 HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_NONE);
305 bitfield_field32_write(device_config, HMAC_CFG_KEY_LENGTH_FIELD,
306 HMAC_CFG_KEY_LENGTH_VALUE_KEY_256);
308 mmio_region_write32(hmac->
base_addr, HMAC_CFG_REG_OFFSET, device_config);