Software APIs
dif_entropy_src_autogen.c
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 // THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
6 // util/make_new_dif.py --mode=regen --only=autogen
7 
8 #include "sw/device/lib/dif/autogen/dif_entropy_src_autogen.h"
9 
10 #include <stdint.h>
11 
12 #include "sw/device/lib/dif/dif_base.h"
13 
14 #include "entropy_src_regs.h" // Generated.
15 
16 OT_WARN_UNUSED_RESULT
17 dif_result_t dif_entropy_src_init(mmio_region_t base_addr,
18  dif_entropy_src_t *entropy_src) {
19  if (entropy_src == NULL) {
20  return kDifBadArg;
21  }
22 
23  entropy_src->base_addr = base_addr;
24 
25  return kDifOk;
26 }
27 
28 dif_result_t dif_entropy_src_alert_force(const dif_entropy_src_t *entropy_src,
29  dif_entropy_src_alert_t alert) {
30  if (entropy_src == NULL) {
31  return kDifBadArg;
32  }
33 
34  bitfield_bit32_index_t alert_idx;
35  switch (alert) {
36  case kDifEntropySrcAlertRecovAlert:
37  alert_idx = ENTROPY_SRC_ALERT_TEST_RECOV_ALERT_BIT;
38  break;
39  case kDifEntropySrcAlertFatalAlert:
40  alert_idx = ENTROPY_SRC_ALERT_TEST_FATAL_ALERT_BIT;
41  break;
42  default:
43  return kDifBadArg;
44  }
45 
46  uint32_t alert_test_reg = bitfield_bit32_write(0, alert_idx, true);
47  mmio_region_write32(entropy_src->base_addr,
48  (ptrdiff_t)ENTROPY_SRC_ALERT_TEST_REG_OFFSET,
49  alert_test_reg);
50 
51  return kDifOk;
52 }
53 
54 /**
55  * Get the corresponding interrupt register bit offset of the IRQ.
56  */
57 static bool entropy_src_get_irq_bit_index(dif_entropy_src_irq_t irq,
58  bitfield_bit32_index_t *index_out) {
59  switch (irq) {
60  case kDifEntropySrcIrqEsEntropyValid:
61  *index_out = ENTROPY_SRC_INTR_COMMON_ES_ENTROPY_VALID_BIT;
62  break;
63  case kDifEntropySrcIrqEsHealthTestFailed:
64  *index_out = ENTROPY_SRC_INTR_COMMON_ES_HEALTH_TEST_FAILED_BIT;
65  break;
66  case kDifEntropySrcIrqEsObserveFifoReady:
67  *index_out = ENTROPY_SRC_INTR_COMMON_ES_OBSERVE_FIFO_READY_BIT;
68  break;
69  case kDifEntropySrcIrqEsFatalErr:
70  *index_out = ENTROPY_SRC_INTR_COMMON_ES_FATAL_ERR_BIT;
71  break;
72  default:
73  return false;
74  }
75 
76  return true;
77 }
78 
79 static dif_irq_type_t irq_types[] = {
80  kDifIrqTypeEvent,
81  kDifIrqTypeEvent,
82  kDifIrqTypeEvent,
83  kDifIrqTypeEvent,
84 };
85 
86 OT_WARN_UNUSED_RESULT
87 dif_result_t dif_entropy_src_irq_get_type(const dif_entropy_src_t *entropy_src,
88  dif_entropy_src_irq_t irq,
89  dif_irq_type_t *type) {
90  if (entropy_src == NULL || type == NULL || irq < 0 ||
91  irq > kDifEntropySrcIrqEsFatalErr) {
92  return kDifBadArg;
93  }
94 
95  *type = irq_types[irq];
96 
97  return kDifOk;
98 }
99 
100 OT_WARN_UNUSED_RESULT
101 dif_result_t dif_entropy_src_irq_get_state(
102  const dif_entropy_src_t *entropy_src,
103  dif_entropy_src_irq_state_snapshot_t *snapshot) {
104  if (entropy_src == NULL || snapshot == NULL) {
105  return kDifBadArg;
106  }
107 
108  *snapshot = mmio_region_read32(entropy_src->base_addr,
109  (ptrdiff_t)ENTROPY_SRC_INTR_STATE_REG_OFFSET);
110 
111  return kDifOk;
112 }
113 
114 OT_WARN_UNUSED_RESULT
115 dif_result_t dif_entropy_src_irq_acknowledge_state(
116  const dif_entropy_src_t *entropy_src,
117  dif_entropy_src_irq_state_snapshot_t snapshot) {
118  if (entropy_src == NULL) {
119  return kDifBadArg;
120  }
121 
122  mmio_region_write32(entropy_src->base_addr,
123  (ptrdiff_t)ENTROPY_SRC_INTR_STATE_REG_OFFSET, snapshot);
124 
125  return kDifOk;
126 }
127 
128 OT_WARN_UNUSED_RESULT
129 dif_result_t dif_entropy_src_irq_is_pending(
130  const dif_entropy_src_t *entropy_src, dif_entropy_src_irq_t irq,
131  bool *is_pending) {
132  if (entropy_src == NULL || is_pending == NULL) {
133  return kDifBadArg;
134  }
135 
136  bitfield_bit32_index_t index;
137  if (!entropy_src_get_irq_bit_index(irq, &index)) {
138  return kDifBadArg;
139  }
140 
141  uint32_t intr_state_reg = mmio_region_read32(
142  entropy_src->base_addr, (ptrdiff_t)ENTROPY_SRC_INTR_STATE_REG_OFFSET);
143 
144  *is_pending = bitfield_bit32_read(intr_state_reg, index);
145 
146  return kDifOk;
147 }
148 
149 OT_WARN_UNUSED_RESULT
150 dif_result_t dif_entropy_src_irq_acknowledge_all(
151  const dif_entropy_src_t *entropy_src) {
152  if (entropy_src == NULL) {
153  return kDifBadArg;
154  }
155 
156  // Writing to the register clears the corresponding bits (Write-one clear).
157  mmio_region_write32(entropy_src->base_addr,
158  (ptrdiff_t)ENTROPY_SRC_INTR_STATE_REG_OFFSET, UINT32_MAX);
159 
160  return kDifOk;
161 }
162 
163 OT_WARN_UNUSED_RESULT
164 dif_result_t dif_entropy_src_irq_acknowledge(
165  const dif_entropy_src_t *entropy_src, dif_entropy_src_irq_t irq) {
166  if (entropy_src == NULL) {
167  return kDifBadArg;
168  }
169 
170  bitfield_bit32_index_t index;
171  if (!entropy_src_get_irq_bit_index(irq, &index)) {
172  return kDifBadArg;
173  }
174 
175  // Writing to the register clears the corresponding bits (Write-one clear).
176  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
177  mmio_region_write32(entropy_src->base_addr,
178  (ptrdiff_t)ENTROPY_SRC_INTR_STATE_REG_OFFSET,
179  intr_state_reg);
180 
181  return kDifOk;
182 }
183 
184 OT_WARN_UNUSED_RESULT
185 dif_result_t dif_entropy_src_irq_force(const dif_entropy_src_t *entropy_src,
186  dif_entropy_src_irq_t irq,
187  const bool val) {
188  if (entropy_src == NULL) {
189  return kDifBadArg;
190  }
191 
192  bitfield_bit32_index_t index;
193  if (!entropy_src_get_irq_bit_index(irq, &index)) {
194  return kDifBadArg;
195  }
196 
197  uint32_t intr_test_reg = bitfield_bit32_write(0, index, val);
198  mmio_region_write32(entropy_src->base_addr,
199  (ptrdiff_t)ENTROPY_SRC_INTR_TEST_REG_OFFSET,
200  intr_test_reg);
201 
202  return kDifOk;
203 }
204 
205 OT_WARN_UNUSED_RESULT
206 dif_result_t dif_entropy_src_irq_get_enabled(
207  const dif_entropy_src_t *entropy_src, dif_entropy_src_irq_t irq,
208  dif_toggle_t *state) {
209  if (entropy_src == NULL || state == NULL) {
210  return kDifBadArg;
211  }
212 
213  bitfield_bit32_index_t index;
214  if (!entropy_src_get_irq_bit_index(irq, &index)) {
215  return kDifBadArg;
216  }
217 
218  uint32_t intr_enable_reg = mmio_region_read32(
219  entropy_src->base_addr, (ptrdiff_t)ENTROPY_SRC_INTR_ENABLE_REG_OFFSET);
220 
221  bool is_enabled = bitfield_bit32_read(intr_enable_reg, index);
222  *state = is_enabled ? kDifToggleEnabled : kDifToggleDisabled;
223 
224  return kDifOk;
225 }
226 
227 OT_WARN_UNUSED_RESULT
228 dif_result_t dif_entropy_src_irq_set_enabled(
229  const dif_entropy_src_t *entropy_src, dif_entropy_src_irq_t irq,
230  dif_toggle_t state) {
231  if (entropy_src == NULL) {
232  return kDifBadArg;
233  }
234 
235  bitfield_bit32_index_t index;
236  if (!entropy_src_get_irq_bit_index(irq, &index)) {
237  return kDifBadArg;
238  }
239 
240  uint32_t intr_enable_reg = mmio_region_read32(
241  entropy_src->base_addr, (ptrdiff_t)ENTROPY_SRC_INTR_ENABLE_REG_OFFSET);
242 
243  bool enable_bit = (state == kDifToggleEnabled) ? true : false;
244  intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
245  mmio_region_write32(entropy_src->base_addr,
246  (ptrdiff_t)ENTROPY_SRC_INTR_ENABLE_REG_OFFSET,
247  intr_enable_reg);
248 
249  return kDifOk;
250 }
251 
252 OT_WARN_UNUSED_RESULT
253 dif_result_t dif_entropy_src_irq_disable_all(
254  const dif_entropy_src_t *entropy_src,
255  dif_entropy_src_irq_enable_snapshot_t *snapshot) {
256  if (entropy_src == NULL) {
257  return kDifBadArg;
258  }
259 
260  // Pass the current interrupt state to the caller, if requested.
261  if (snapshot != NULL) {
262  *snapshot = mmio_region_read32(
263  entropy_src->base_addr, (ptrdiff_t)ENTROPY_SRC_INTR_ENABLE_REG_OFFSET);
264  }
265 
266  // Disable all interrupts.
267  mmio_region_write32(entropy_src->base_addr,
268  (ptrdiff_t)ENTROPY_SRC_INTR_ENABLE_REG_OFFSET, 0u);
269 
270  return kDifOk;
271 }
272 
273 OT_WARN_UNUSED_RESULT
274 dif_result_t dif_entropy_src_irq_restore_all(
275  const dif_entropy_src_t *entropy_src,
276  const dif_entropy_src_irq_enable_snapshot_t *snapshot) {
277  if (entropy_src == NULL || snapshot == NULL) {
278  return kDifBadArg;
279  }
280 
281  mmio_region_write32(entropy_src->base_addr,
282  (ptrdiff_t)ENTROPY_SRC_INTR_ENABLE_REG_OFFSET, *snapshot);
283 
284  return kDifOk;
285 }
Return to OpenTitan Documentation