Software APIs
dif_aes_autogen.h
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1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 #ifndef OPENTITAN_SW_DEVICE_LIB_DIF_AUTOGEN_DIF_AES_AUTOGEN_H_
6 #define OPENTITAN_SW_DEVICE_LIB_DIF_AUTOGEN_DIF_AES_AUTOGEN_H_
7 
8 // THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
9 // util/make_new_dif.py --mode=regen --only=autogen
10 
11 /**
12  * @file
13  * @brief <a href="/book/hw/ip/aes/">AES</a> Device Interface Functions
14  */
15 
16 #include <stdbool.h>
17 #include <stdint.h>
18 
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif // __cplusplus
26 
27 /**
28  * A handle to aes.
29  *
30  * This type should be treated as opaque by users.
31  */
32 typedef struct dif_aes {
33  /**
34  * The base address for the aes hardware registers.
35  */
38 
39 /**
40  * Creates a new handle for a(n) aes peripheral.
41  *
42  * This function does not actuate the hardware.
43  *
44  * @param base_addr The MMIO base address of the aes peripheral.
45  * @param[out] aes Out param for the initialized handle.
46  * @return The result of the operation.
47  */
50 
51 /**
52  * A aes alert type.
53  */
54 typedef enum dif_aes_alert {
55  /**
56  * This recoverable alert is triggered upon detecting an update error in the
57  * shadowed Control Register. The content of the Control Register is not
58  * modified (See Control Register). The AES unit can be recovered from such a
59  * condition by restarting the AES operation, i.e., by re-writing the Control
60  * Register. This should be monitored by the system.
61  */
63  /**
64  * This fatal alert is triggered upon detecting a fatal fault inside the AES
65  * unit. Examples for such faults include i) storage errors in the shadowed
66  * Control Register, ii) any internal FSM entering an invalid state, iii) any
67  * sparsely encoded signal taking on an invalid value, iv) errors in the
68  * internal round counter, v) escalations triggered by the life cycle
69  * controller, and vi) fatal integrity failures on the TL-UL bus. The AES unit
70  * cannot recover from such an error and needs to be reset.
71  */
74 
75 /**
76  * Forces a particular alert, causing it to be escalated as if the hardware
77  * had raised it.
78  *
79  * @param aes A aes handle.
80  * @param alert The alert to force.
81  * @return The result of the operation.
82  */
85 
86 #ifdef __cplusplus
87 } // extern "C"
88 #endif // __cplusplus
89 
90 #endif // OPENTITAN_SW_DEVICE_LIB_DIF_AUTOGEN_DIF_AES_AUTOGEN_H_