Software APIs
dif_ac_range_check_autogen.c
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
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11// THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
12// util/autogen_dif.py -i
13// hw/top_darjeeling/ip_autogen/ac_range_check/data/ac_range_check.hjson
14// -o
15// bazel-out/k8-fastbuild-ST-ae23cdef058d/bin/sw/device/lib/dif/autogen
16
17
18#include <stdint.h>
19
22
23#include "ac_range_check_regs.h" // Generated.
24
25
27dif_result_t dif_ac_range_check_init(
28 mmio_region_t base_addr,
29 dif_ac_range_check_t *ac_range_check) {
30 if (ac_range_check == NULL) {
31 return kDifBadArg;
32 }
33
34 ac_range_check->dt = kDtAcRangeCheckCount;
35 ac_range_check->base_addr = base_addr;
36
37 return kDifOk;
38}
39
41dif_result_t dif_ac_range_check_init_from_dt(
43 dif_ac_range_check_t *ac_range_check) {
44 if (ac_range_check == NULL) {
45 return kDifBadArg;
46 }
47
48 ac_range_check->dt = dt;
49 ac_range_check->base_addr = mmio_region_from_addr(dt_ac_range_check_primary_reg_block(dt));
50
51 return kDifOk;
52}
53
54dif_result_t dif_ac_range_check_get_dt(
55 const dif_ac_range_check_t *ac_range_check,
57 if (ac_range_check->dt == kDtAcRangeCheckCount || dt == NULL) {
58 return kDifBadArg;
59 }
60 *dt = ac_range_check->dt;
61 return kDifOk;
62}
63
64 dif_result_t dif_ac_range_check_alert_force(
65 const dif_ac_range_check_t *ac_range_check,
67 if (ac_range_check == NULL) {
68 return kDifBadArg;
69 }
70
71 bitfield_bit32_index_t alert_idx;
72 switch (alert) {
74 alert_idx = AC_RANGE_CHECK_ALERT_TEST_RECOV_CTRL_UPDATE_ERR_BIT;
75 break;
77 alert_idx = AC_RANGE_CHECK_ALERT_TEST_FATAL_FAULT_BIT;
78 break;
79 default:
80 return kDifBadArg;
81 }
82
83 uint32_t alert_test_reg = bitfield_bit32_write(0, alert_idx, true);
84 mmio_region_write32(
85 ac_range_check->base_addr,
86 (ptrdiff_t)AC_RANGE_CHECK_ALERT_TEST_REG_OFFSET,
87 alert_test_reg);
88
89
90 return kDifOk;
91}
92
93
94 /**
95 * Get the corresponding interrupt register bit offset of the IRQ.
96 */
97 static bool ac_range_check_get_irq_bit_index(
98 dif_ac_range_check_irq_t irq,
99 bitfield_bit32_index_t *index_out) {
100
101 switch (irq) {
103 *index_out = AC_RANGE_CHECK_INTR_COMMON_DENY_CNT_REACHED_BIT;
104 break;
105 default:
106 return false;
107 }
108
109 return true;
110 }
111
112 static dif_irq_type_t irq_types[] = {
114 };
115
117 dif_result_t dif_ac_range_check_irq_get_type(
118 const dif_ac_range_check_t *ac_range_check,
119 dif_ac_range_check_irq_t irq,
120 dif_irq_type_t *type) {
121
122
123 if (ac_range_check == NULL ||
124 type == NULL ||
127 return kDifBadArg;
128 }
129
130 *type = irq_types[irq];
131
132 return kDifOk;
133 }
134
136 dif_result_t dif_ac_range_check_irq_get_state(
137 const dif_ac_range_check_t *ac_range_check,
139
140 if (ac_range_check == NULL || snapshot == NULL) {
141 return kDifBadArg;
142 }
143
144 *snapshot = mmio_region_read32(
145 ac_range_check->base_addr,
146 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET);
147
148
149 return kDifOk;
150 }
151
153 dif_result_t dif_ac_range_check_irq_acknowledge_state(
154 const dif_ac_range_check_t *ac_range_check,
156 if (ac_range_check == NULL) {
157 return kDifBadArg;
158 }
159
160 mmio_region_write32(
161 ac_range_check->base_addr,
162 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET,
163 snapshot);
164
165
166 return kDifOk;
167 }
168
170 dif_result_t dif_ac_range_check_irq_is_pending(
171 const dif_ac_range_check_t *ac_range_check,
172 dif_ac_range_check_irq_t irq,
173 bool *is_pending) {
174
175 if (ac_range_check == NULL || is_pending == NULL) {
176 return kDifBadArg;
177 }
178
180 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
181 return kDifBadArg;
182 }
183
184 uint32_t intr_state_reg = mmio_region_read32(
185 ac_range_check->base_addr,
186 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET);
187
188
189 *is_pending = bitfield_bit32_read(intr_state_reg, index);
190
191 return kDifOk;
192 }
193
195 dif_result_t dif_ac_range_check_irq_acknowledge_all(
196 const dif_ac_range_check_t *ac_range_check
197 ) {
198
199 if (ac_range_check == NULL) {
200 return kDifBadArg;
201 }
202
203 // Writing to the register clears the corresponding bits (Write-one clear).
204 mmio_region_write32(
205 ac_range_check->base_addr,
206 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET,
207 UINT32_MAX);
208
209
210 return kDifOk;
211 }
212
214 dif_result_t dif_ac_range_check_irq_acknowledge(
215 const dif_ac_range_check_t *ac_range_check,
216 dif_ac_range_check_irq_t irq) {
217
218 if (ac_range_check == NULL) {
219 return kDifBadArg;
220 }
221
223 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
224 return kDifBadArg;
225 }
226
227 // Writing to the register clears the corresponding bits (Write-one clear).
228 uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
229 mmio_region_write32(
230 ac_range_check->base_addr,
231 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET,
232 intr_state_reg);
233
234
235 return kDifOk;
236 }
237
239 dif_result_t dif_ac_range_check_irq_force(
240 const dif_ac_range_check_t *ac_range_check,
241 dif_ac_range_check_irq_t irq,
242 const bool val) {
243
244 if (ac_range_check == NULL) {
245 return kDifBadArg;
246 }
247
249 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
250 return kDifBadArg;
251 }
252
253 uint32_t intr_test_reg = bitfield_bit32_write(0, index, val);
254 mmio_region_write32(
255 ac_range_check->base_addr,
256 (ptrdiff_t)AC_RANGE_CHECK_INTR_TEST_REG_OFFSET,
257 intr_test_reg);
258
259
260 return kDifOk;
261 }
262
264 dif_result_t dif_ac_range_check_irq_get_enabled(
265 const dif_ac_range_check_t *ac_range_check,
266 dif_ac_range_check_irq_t irq,
267 dif_toggle_t *state) {
268
269 if (ac_range_check == NULL || state == NULL) {
270 return kDifBadArg;
271 }
272
274 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
275 return kDifBadArg;
276 }
277
278 uint32_t intr_enable_reg = mmio_region_read32(
279 ac_range_check->base_addr,
280 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET);
281
282
283 bool is_enabled = bitfield_bit32_read(intr_enable_reg, index);
284 *state = is_enabled ?
286
287 return kDifOk;
288 }
289
291 dif_result_t dif_ac_range_check_irq_set_enabled(
292 const dif_ac_range_check_t *ac_range_check,
293 dif_ac_range_check_irq_t irq,
294 dif_toggle_t state) {
295
296 if (ac_range_check == NULL) {
297 return kDifBadArg;
298 }
299
301 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
302 return kDifBadArg;
303 }
304
305 uint32_t intr_enable_reg = mmio_region_read32(
306 ac_range_check->base_addr,
307 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET);
308
309
310 bool enable_bit = (state == kDifToggleEnabled) ? true : false;
311 intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
312 mmio_region_write32(
313 ac_range_check->base_addr,
314 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET,
315 intr_enable_reg);
316
317
318 return kDifOk;
319 }
320
322 dif_result_t dif_ac_range_check_irq_disable_all(
323 const dif_ac_range_check_t *ac_range_check,
325
326 if (ac_range_check == NULL) {
327 return kDifBadArg;
328 }
329
330 // Pass the current interrupt state to the caller, if requested.
331 if (snapshot != NULL) {
332 *snapshot = mmio_region_read32(
333 ac_range_check->base_addr,
334 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET);
335
336 }
337
338 // Disable all interrupts.
339 mmio_region_write32(
340 ac_range_check->base_addr,
341 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET,
342 0u);
343
344
345 return kDifOk;
346 }
347
349 dif_result_t dif_ac_range_check_irq_restore_all(
350 const dif_ac_range_check_t *ac_range_check,
352
353 if (ac_range_check == NULL || snapshot == NULL) {
354 return kDifBadArg;
355 }
356
357 mmio_region_write32(
358 ac_range_check->base_addr,
359 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET,
360 *snapshot);
361
362
363 return kDifOk;
364 }
365