Software APIs
dif_ac_range_check_autogen.c
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5
6
7
8
9
10
11// THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
12// util/autogen_dif.py -i
13// hw/top_darjeeling/ip_autogen/ac_range_check/data/ac_range_check.hjson
14// -o
15// bazel-out/k8-fastbuild-ST-ae23cdef058d/bin/sw/device/lib/dif/autogen
16
17
18#include <stdint.h>
19
20#include "sw/device/lib/dif/dif_base.h"
21#include "sw/device/lib/dif/autogen/dif_ac_range_check_autogen.h"
22
23#include "hw/top/ac_range_check_regs.h" // Generated.
24
25
26OT_WARN_UNUSED_RESULT
27dif_result_t dif_ac_range_check_init(
28 mmio_region_t base_addr,
29 dif_ac_range_check_t *ac_range_check) {
30 if (ac_range_check == NULL) {
31 return kDifBadArg;
32 }
33
34 ac_range_check->dt = kDtAcRangeCheckCount;
35 ac_range_check->base_addr = base_addr;
36
37 return kDifOk;
38}
39
40OT_WARN_UNUSED_RESULT
41dif_result_t dif_ac_range_check_init_from_dt(
42 dt_ac_range_check_t dt,
43 dif_ac_range_check_t *ac_range_check) {
44 if (ac_range_check == NULL) {
45 return kDifBadArg;
46 }
47
48 ac_range_check->dt = dt;
49 ac_range_check->base_addr = mmio_region_from_addr(dt_ac_range_check_primary_reg_block(dt));
50
51 return kDifOk;
52}
53
54dif_result_t dif_ac_range_check_get_dt(
55 const dif_ac_range_check_t *ac_range_check,
56 dt_ac_range_check_t *dt) {
57 if ((int)ac_range_check->dt == kDtAcRangeCheckCount || dt == NULL) {
58 return kDifBadArg;
59 }
60 *dt = ac_range_check->dt;
61 return kDifOk;
62}
63
64 dif_result_t dif_ac_range_check_alert_force(
65 const dif_ac_range_check_t *ac_range_check,
66 dif_ac_range_check_alert_t alert) {
67 if (ac_range_check == NULL) {
68 return kDifBadArg;
69 }
70
71 bitfield_bit32_index_t alert_idx;
72 switch (alert) {
73 case kDifAcRangeCheckAlertRecovCtrlUpdateErr:
74 alert_idx = AC_RANGE_CHECK_ALERT_TEST_RECOV_CTRL_UPDATE_ERR_BIT;
75 break;
76 case kDifAcRangeCheckAlertFatalFault:
77 alert_idx = AC_RANGE_CHECK_ALERT_TEST_FATAL_FAULT_BIT;
78 break;
79 default:
80 return kDifBadArg;
81 }
82
83 uint32_t alert_test_reg = bitfield_bit32_write(0, alert_idx, true);
84 // Keep the alert test enabled: writing 0 to the regwen bit locks the register.
85 alert_test_reg = bitfield_bit32_write(
86 alert_test_reg, AC_RANGE_CHECK_ALERT_TEST_REGWEN_BIT, true);
87 mmio_region_write32(
88 ac_range_check->base_addr,
89 (ptrdiff_t)AC_RANGE_CHECK_ALERT_TEST_REG_OFFSET,
90 alert_test_reg);
91
92
93 return kDifOk;
94}
95
96
97 /**
98 * Get the corresponding interrupt register bit offset of the IRQ.
99 */
100 static bool ac_range_check_get_irq_bit_index(
101 dif_ac_range_check_irq_t irq,
102 bitfield_bit32_index_t *index_out) {
103
104 switch (irq) {
105 case kDtAcRangeCheckIrqDenyCntReached:
106 *index_out = AC_RANGE_CHECK_INTR_COMMON_DENY_CNT_REACHED_BIT;
107 break;
108 default:
109 return false;
110 }
111
112 return true;
113 }
114
115 static dif_irq_type_t irq_types[] = {
116 kDifIrqTypeStatus,
117 };
118
119 OT_WARN_UNUSED_RESULT
120 dif_result_t dif_ac_range_check_irq_get_type(
121 const dif_ac_range_check_t *ac_range_check,
122 dif_ac_range_check_irq_t irq,
123 dif_irq_type_t *type) {
124
125
126 if (ac_range_check == NULL ||
127 type == NULL ||
128 irq < kDifAcRangeCheckIrqDenyCntReached ||
129 irq > kDifAcRangeCheckIrqDenyCntReached) {
130 return kDifBadArg;
131 }
132
133 *type = irq_types[irq];
134
135 return kDifOk;
136 }
137
138 OT_WARN_UNUSED_RESULT
139 dif_result_t dif_ac_range_check_irq_get_state(
140 const dif_ac_range_check_t *ac_range_check,
141 dif_ac_range_check_irq_state_snapshot_t *snapshot) {
142
143 if (ac_range_check == NULL || snapshot == NULL) {
144 return kDifBadArg;
145 }
146
147 *snapshot = mmio_region_read32(
148 ac_range_check->base_addr,
149 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET);
150
151
152 return kDifOk;
153 }
154
155 OT_WARN_UNUSED_RESULT
156 dif_result_t dif_ac_range_check_irq_acknowledge_state(
157 const dif_ac_range_check_t *ac_range_check,
158 dif_ac_range_check_irq_state_snapshot_t snapshot) {
159 if (ac_range_check == NULL) {
160 return kDifBadArg;
161 }
162
163 mmio_region_write32(
164 ac_range_check->base_addr,
165 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET,
166 snapshot);
167
168
169 return kDifOk;
170 }
171
172 OT_WARN_UNUSED_RESULT
173 dif_result_t dif_ac_range_check_irq_is_pending(
174 const dif_ac_range_check_t *ac_range_check,
175 dif_ac_range_check_irq_t irq,
176 bool *is_pending) {
177
178 if (ac_range_check == NULL || is_pending == NULL) {
179 return kDifBadArg;
180 }
181
182 bitfield_bit32_index_t index;
183 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
184 return kDifBadArg;
185 }
186
187 uint32_t intr_state_reg = mmio_region_read32(
188 ac_range_check->base_addr,
189 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET);
190
191
192 *is_pending = bitfield_bit32_read(intr_state_reg, index);
193
194 return kDifOk;
195 }
196
197 OT_WARN_UNUSED_RESULT
198 dif_result_t dif_ac_range_check_irq_acknowledge_all(
199 const dif_ac_range_check_t *ac_range_check
200 ) {
201
202 if (ac_range_check == NULL) {
203 return kDifBadArg;
204 }
205
206 // Writing to the register clears the corresponding bits (Write-one clear).
207 mmio_region_write32(
208 ac_range_check->base_addr,
209 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET,
210 UINT32_MAX);
211
212
213 return kDifOk;
214 }
215
216 OT_WARN_UNUSED_RESULT
217 dif_result_t dif_ac_range_check_irq_acknowledge(
218 const dif_ac_range_check_t *ac_range_check,
219 dif_ac_range_check_irq_t irq) {
220
221 if (ac_range_check == NULL) {
222 return kDifBadArg;
223 }
224
225 bitfield_bit32_index_t index;
226 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
227 return kDifBadArg;
228 }
229
230 // Writing to the register clears the corresponding bits (Write-one clear).
231 uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
232 mmio_region_write32(
233 ac_range_check->base_addr,
234 (ptrdiff_t)AC_RANGE_CHECK_INTR_STATE_REG_OFFSET,
235 intr_state_reg);
236
237
238 return kDifOk;
239 }
240
241 OT_WARN_UNUSED_RESULT
242 dif_result_t dif_ac_range_check_irq_force(
243 const dif_ac_range_check_t *ac_range_check,
244 dif_ac_range_check_irq_t irq,
245 const bool val) {
246
247 if (ac_range_check == NULL) {
248 return kDifBadArg;
249 }
250
251 bitfield_bit32_index_t index;
252 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
253 return kDifBadArg;
254 }
255
256 uint32_t intr_test_reg = bitfield_bit32_write(0, index, val);
257 mmio_region_write32(
258 ac_range_check->base_addr,
259 (ptrdiff_t)AC_RANGE_CHECK_INTR_TEST_REG_OFFSET,
260 intr_test_reg);
261
262
263 return kDifOk;
264 }
265
266 OT_WARN_UNUSED_RESULT
267 dif_result_t dif_ac_range_check_irq_get_enabled(
268 const dif_ac_range_check_t *ac_range_check,
269 dif_ac_range_check_irq_t irq,
270 dif_toggle_t *state) {
271
272 if (ac_range_check == NULL || state == NULL) {
273 return kDifBadArg;
274 }
275
276 bitfield_bit32_index_t index;
277 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
278 return kDifBadArg;
279 }
280
281 uint32_t intr_enable_reg = mmio_region_read32(
282 ac_range_check->base_addr,
283 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET);
284
285
286 bool is_enabled = bitfield_bit32_read(intr_enable_reg, index);
287 *state = is_enabled ?
288 kDifToggleEnabled : kDifToggleDisabled;
289
290 return kDifOk;
291 }
292
293 OT_WARN_UNUSED_RESULT
294 dif_result_t dif_ac_range_check_irq_set_enabled(
295 const dif_ac_range_check_t *ac_range_check,
296 dif_ac_range_check_irq_t irq,
297 dif_toggle_t state) {
298
299 if (ac_range_check == NULL) {
300 return kDifBadArg;
301 }
302
303 bitfield_bit32_index_t index;
304 if (!ac_range_check_get_irq_bit_index(irq, &index)) {
305 return kDifBadArg;
306 }
307
308 uint32_t intr_enable_reg = mmio_region_read32(
309 ac_range_check->base_addr,
310 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET);
311
312
313 bool enable_bit = (state == kDifToggleEnabled) ? true : false;
314 intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
315 mmio_region_write32(
316 ac_range_check->base_addr,
317 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET,
318 intr_enable_reg);
319
320
321 return kDifOk;
322 }
323
324 OT_WARN_UNUSED_RESULT
325 dif_result_t dif_ac_range_check_irq_disable_all(
326 const dif_ac_range_check_t *ac_range_check,
327 dif_ac_range_check_irq_enable_snapshot_t *snapshot) {
328
329 if (ac_range_check == NULL) {
330 return kDifBadArg;
331 }
332
333 // Pass the current interrupt state to the caller, if requested.
334 if (snapshot != NULL) {
335 *snapshot = mmio_region_read32(
336 ac_range_check->base_addr,
337 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET);
338
339 }
340
341 // Disable all interrupts.
342 mmio_region_write32(
343 ac_range_check->base_addr,
344 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET,
345 0u);
346
347
348 return kDifOk;
349 }
350
351 OT_WARN_UNUSED_RESULT
352 dif_result_t dif_ac_range_check_irq_restore_all(
353 const dif_ac_range_check_t *ac_range_check,
354 const dif_ac_range_check_irq_enable_snapshot_t *snapshot) {
355
356 if (ac_range_check == NULL || snapshot == NULL) {
357 return kDifBadArg;
358 }
359
360 mmio_region_write32(
361 ac_range_check->base_addr,
362 (ptrdiff_t)AC_RANGE_CHECK_INTR_ENABLE_REG_OFFSET,
363 *snapshot);
364
365
366 return kDifOk;
367 }
368