cheriot.h

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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Device table API auto-generated by `dtgen`
 
#ifndef OPENTITAN_DT_CHERIOT_H_
#define OPENTITAN_DT_CHERIOT_H_
 
#ifdef __cplusplus
extern "C" {
#endif  // __cplusplus
 
/**
 * @file
 * @brief Device Tables (DT) for IP cheriot and top earlgrey.
 *
 * This file contains the type definitions and global functions of the cheriot.
 */
 
#include "hw/top/dt/api.h"
#include <stdint.h>
 
 
 
/**
 * List of instances.
 */
typedef enum dt_cheriot {
  kDtCheriotFirst = 0, /**< First instance */
  kDtCheriot = 0, /**< cheriot */
} dt_cheriot_t;
 
enum {
  kDtCheriotCount = 1, /**< Number of instances */
};
 
 
/**
 * List of register blocks.
 *
 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_cheriot_reg_block {
  kDtCheriotRegBlockRegs = 0, /**<  */
} dt_cheriot_reg_block_t;
 
enum {
  kDtCheriotRegBlockCount = 1, /**< Number of register blocks */
};
 
 
/** Primary register block (associated with the "primary" set of registers that control the IP). */
static const dt_cheriot_reg_block_t kDtCheriotRegBlockPrimary = kDtCheriotRegBlockRegs;
 
/**
 * List of memories.
 *
 * Memories are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_cheriot_memory {
  kDtCheriotMemoryRevbm = 0, /**<  */
} dt_cheriot_memory_t;
 
enum {
  kDtCheriotMemoryCount = 1, /**< Number of memories */
};
 
 
/**
 * List of Alerts.
 *
 * Alerts are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_cheriot_alert {
  kDtCheriotAlertFatalFault = 0, /**< This fatal alert is triggered when an integrity fault is detected, when the meta
  SRAM path returns a device error, or when the tag filter's transaction FIFO reports
  a pointer error. */
} dt_cheriot_alert_t;
 
enum {
  kDtCheriotAlertCount = 1, /**< Number of Alerts */
};
 
 
/**
 * List of clock ports.
 *
 * Clock ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_cheriot_clock {
  kDtCheriotClockClk = 0, /**< Clock port clk_i */
} dt_cheriot_clock_t;
 
enum {
  kDtCheriotClockCount = 1, /**< Number of clock ports */
};
 
 
/**
 * List of reset ports.
 *
 * Reset ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_cheriot_reset {
  kDtCheriotResetRst = 0, /**< Reset port rst_ni */
} dt_cheriot_reset_t;
 
enum {
  kDtCheriotResetCount = 1, /**< Number of reset ports */
};
 
 
/**
 * List of supported hardware features.
 */
#define OPENTITAN_CHERIOT_HAS_TAG_SPLIT 1
#define OPENTITAN_CHERIOT_HAS_TAG_READ 1
#define OPENTITAN_CHERIOT_HAS_TAG_WRITE_RMW 1
#define OPENTITAN_CHERIOT_HAS_TAG_CLEAR_ON_DATA_WRITE 1
#define OPENTITAN_CHERIOT_HAS_REVOCATION_BITMAP 1
#define OPENTITAN_CHERIOT_HAS_ACCESS_CHECK 1
#define OPENTITAN_CHERIOT_HAS_MODE_GATING 1
 
 
 
/**
 * Get the cheriot instance from an instance ID
 *
 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
 *
 * @param inst_id Instance ID.
 * @return A cheriot instance.
 *
 * **Note:** This function only makes sense if the instance ID has device type cheriot,
 * otherwise the returned value is unspecified.
 */
dt_cheriot_t dt_cheriot_from_instance_id(dt_instance_id_t inst_id);
 
/**
 * Get the instance ID of an instance.
 *
 * @param dt Instance of cheriot.
 * @return The instance ID of that instance.
 */
dt_instance_id_t dt_cheriot_instance_id(dt_cheriot_t dt);
 
/**
 * Get the register base address of an instance.
 *
 * @param dt Instance of cheriot.
 * @param reg_block The register block requested.
 * @return The register base address of the requested block.
 */
uint32_t dt_cheriot_reg_block(
    dt_cheriot_t dt,
    dt_cheriot_reg_block_t reg_block);
 
/**
 * Get the primary register base address of an instance.
 *
 * This is just a convenience function, equivalent to
 * `dt_cheriot_reg_block(dt, kDtCheriotRegBlockRegs)`
 *
 * @param dt Instance of cheriot.
 * @return The register base address of the primary register block.
 */
static inline uint32_t dt_cheriot_primary_reg_block(
    dt_cheriot_t dt) {
  return dt_cheriot_reg_block(dt, kDtCheriotRegBlockRegs);
}
 
/**
 * Get the base address of a memory.
 *
 * @param dt Instance of cheriot.
 * @param mem The memory requested.
 * @return The base address of the requested memory.
 */
uint32_t dt_cheriot_memory_base(
    dt_cheriot_t dt,
    dt_cheriot_memory_t mem);
 
/**
 * Get the size of a memory.
 *
 * @param dt Instance of cheriot.
 * @param mem The memory requested.
 * @return The size of the requested memory.
 */
uint32_t dt_cheriot_memory_size(
    dt_cheriot_t dt,
    dt_cheriot_memory_t mem);
 
 
/**
 * Get the alert ID of a cheriot alert for a given instance.
 *
 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
 * instances where the instance is not connected, the return value is unspecified.
 *
 * @param dt Instance of cheriot.
 * @param alert A cheriot alert.
 * @return The Alert Handler alert ID of the alert of this instance.
 */
dt_alert_id_t dt_cheriot_alert_to_alert_id(
    dt_cheriot_t dt,
    dt_cheriot_alert_t alert);
 
/**
 * Convert a global alert ID to a local cheriot alert type.
 *
 * @param dt Instance of cheriot.
 * @param alert A global alert ID that belongs to this instance.
 * @return The cheriot alert, or `kDtCheriotAlertCount`.
 *
 * **Note:** This function assumes that the global alert ID belongs to the
 * instance of cheriot passed in parameter. In other words, it must be the case
 * that `dt_cheriot_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
 * this function will return `kDtCheriotAlertCount`.
 */
dt_cheriot_alert_t dt_cheriot_alert_from_alert_id(
    dt_cheriot_t dt,
    dt_alert_id_t alert);
 
 
 
/**
 * Get the clock signal connected to a clock port of an instance.
 *
 * @param dt Instance of cheriot.
 * @param clk Clock port.
 * @return Clock signal.
 */
dt_clock_t dt_cheriot_clock(
    dt_cheriot_t dt,
    dt_cheriot_clock_t clk);
 
/**
 * Get the reset signal connected to a reset port of an instance.
 *
 * @param dt Instance of cheriot.
 * @param rst Reset port.
 * @return Reset signal.
 */
dt_reset_t dt_cheriot_reset(
    dt_cheriot_t dt,
    dt_cheriot_reset_t rst);
 
 
 
#ifdef __cplusplus
}  // extern "C"
#endif  // __cplusplus
 
#endif  // OPENTITAN_DT_CHERIOT_H_