Software APIs
aon_timer_testutils.c
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#include "sw/device/lib/testing/aon_timer_testutils.h"
6
7#include <stdbool.h>
8#include <stdint.h>
9
10#include "hw/top/dt/aon_timer.h" // Generated
11#include "hw/top/dt/api.h" // Generated
16#include "sw/device/lib/testing/test_framework/check.h"
17
18#define MODULE_ID MAKE_MODULE_ID('a', 'o', 't')
19
20status_t aon_timer_testutils_get_aon_cycles_32_from_us(uint64_t microseconds,
21 uint32_t *cycles) {
22 uint64_t cycles_ =
23 udiv64_slow(microseconds * dt_clock_frequency(dt_aon_timer_clock(
25 1000000,
26 /*rem_out=*/NULL);
27 TRY_CHECK(cycles_ <= UINT32_MAX,
28 "The value 0x%08x%08x can't fit into the 32 bits timer counter.",
29 (uint32_t)(cycles_ >> 32), (uint32_t)cycles_);
30 *cycles = (uint32_t)cycles_;
31 return OK_STATUS();
32}
33
34status_t aon_timer_testutils_get_aon_cycles_64_from_us(uint64_t microseconds,
35 uint64_t *cycles) {
36 *cycles = udiv64_slow(microseconds * dt_clock_frequency(dt_aon_timer_clock(
38 1000000,
39 /*rem_out=*/NULL);
40 return OK_STATUS();
41}
42
43status_t aon_timer_testutils_get_us_from_aon_cycles(uint64_t cycles,
44 uint32_t *us) {
45 uint64_t uss = udiv64_slow(
46 cycles * 1000000,
48 /*rem_out=*/NULL);
49 TRY_CHECK(uss <= UINT32_MAX,
50 "The value 0x%08x%08x can't fit into the 32 bits timer counter.",
51 (uint32_t)(uss >> 32), (uint32_t)uss);
52 *us = (uint32_t)uss;
53 return OK_STATUS();
54}
55
56status_t aon_timer_testutils_wakeup_config(const dif_aon_timer_t *aon_timer,
57 uint64_t cycles) {
58 // Make sure that wake-up timer is stopped.
59 TRY(dif_aon_timer_wakeup_stop(aon_timer));
60
61 // Make sure the wake-up IRQ is cleared to avoid false positive.
62 TRY(dif_aon_timer_irq_acknowledge(aon_timer,
64
65 bool is_pending = true;
66 TRY(dif_aon_timer_irq_is_pending(aon_timer, kDifAonTimerIrqWkupTimerExpired,
67 &is_pending));
68 TRY_CHECK(!is_pending);
69
70 // Set prescaler to zero.
71 TRY(dif_aon_timer_wakeup_start(aon_timer, cycles, 0));
72 return OK_STATUS();
73}
74
75status_t aon_timer_testutils_watchdog_config(const dif_aon_timer_t *aon_timer,
76 uint32_t bark_cycles,
77 uint32_t bite_cycles,
78 bool pause_in_sleep) {
79 // Make sure that watchdog timer is stopped.
80 TRY(dif_aon_timer_watchdog_stop(aon_timer));
81
82 // Make sure the watchdog IRQ is cleared to avoid false positive.
83 TRY(dif_aon_timer_irq_acknowledge(aon_timer, kDifAonTimerIrqWdogTimerBark));
84 bool is_pending = true;
85 TRY(dif_aon_timer_irq_is_pending(aon_timer, kDifAonTimerIrqWdogTimerBark,
86 &is_pending));
87 TRY_CHECK(!is_pending);
88 TRY(dif_aon_timer_watchdog_start(aon_timer, bark_cycles, bite_cycles,
89 pause_in_sleep, false));
90 return OK_STATUS();
91}
92
93status_t aon_timer_testutils_shutdown(const dif_aon_timer_t *aon_timer) {
94 TRY(dif_aon_timer_wakeup_stop(aon_timer));
95 TRY(dif_aon_timer_watchdog_stop(aon_timer));
96 TRY(dif_aon_timer_clear_wakeup_cause(aon_timer));
97 TRY(dif_aon_timer_irq_acknowledge_all(aon_timer));
98 // Read and verify both timers are actually disabled. This ensures the
99 // synchronization from the core clock to the AON clock domain completed.
100 bool enabled;
101 TRY(dif_aon_timer_wakeup_is_enabled(aon_timer, &enabled));
102 TRY_CHECK(enabled == false);
103 TRY(dif_aon_timer_watchdog_is_enabled(aon_timer, &enabled));
104 TRY_CHECK(enabled == false);
105 return OK_STATUS();
106}