Software APIs
aon_timer_testutils.c
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#include "sw/device/lib/testing/aon_timer_testutils.h"
6
7#include <stdbool.h>
8#include <stdint.h>
9
10#include "dt/dt_aon_timer.h" // Generated
11#include "dt/dt_api.h" // Generated
12#include "sw/device/lib/arch/device.h"
13#include "sw/device/lib/base/math.h"
14#include "sw/device/lib/base/mmio.h"
15#include "sw/device/lib/dif/dif_aon_timer.h"
16#include "sw/device/lib/testing/test_framework/check.h"
17
18#define MODULE_ID MAKE_MODULE_ID('a', 'o', 't')
19
20status_t aon_timer_testutils_get_aon_cycles_32_from_us(uint64_t microseconds,
21 uint32_t *cycles) {
22 uint64_t cycles_ =
23 udiv64_slow(microseconds * dt_clock_frequency(dt_aon_timer_clock(
24 kDtAonTimerAon, kDtAonTimerClockAon)),
25 1000000,
26 /*rem_out=*/NULL);
27 TRY_CHECK(cycles_ <= UINT32_MAX,
28 "The value 0x%08x%08x can't fit into the 32 bits timer counter.",
29 (uint32_t)(cycles_ >> 32), (uint32_t)cycles_);
30 *cycles = (uint32_t)cycles_;
31 return OK_STATUS();
32}
33
34status_t aon_timer_testutils_get_aon_cycles_64_from_us(uint64_t microseconds,
35 uint64_t *cycles) {
36 *cycles =
37 udiv64_slow(microseconds * dt_clock_frequency(dt_aon_timer_clock(
38 kDtAonTimerAon, kDtAonTimerClockAon)),
39 1000000,
40 /*rem_out=*/NULL);
41 return OK_STATUS();
42}
43
44status_t aon_timer_testutils_get_us_from_aon_cycles(uint64_t cycles,
45 uint32_t *us) {
46 uint64_t uss = udiv64_slow(cycles * 1000000,
47 dt_clock_frequency(dt_aon_timer_clock(
48 kDtAonTimerAon, kDtAonTimerClockAon)),
49 /*rem_out=*/NULL);
50 TRY_CHECK(uss <= UINT32_MAX,
51 "The value 0x%08x%08x can't fit into the 32 bits timer counter.",
52 (uint32_t)(uss >> 32), (uint32_t)uss);
53 *us = (uint32_t)uss;
54 return OK_STATUS();
55}
56
57status_t aon_timer_testutils_wakeup_config(const dif_aon_timer_t *aon_timer,
58 uint64_t cycles) {
59 // Make sure that wake-up timer is stopped.
60 TRY(dif_aon_timer_wakeup_stop(aon_timer));
61
62 // Make sure the wake-up IRQ is cleared to avoid false positive.
63 TRY(dif_aon_timer_irq_acknowledge(aon_timer,
64 kDifAonTimerIrqWkupTimerExpired));
65
66 bool is_pending = true;
67 TRY(dif_aon_timer_irq_is_pending(aon_timer, kDifAonTimerIrqWkupTimerExpired,
68 &is_pending));
69 TRY_CHECK(!is_pending);
70
71 // Set prescaler to zero.
72 TRY(dif_aon_timer_wakeup_start(aon_timer, cycles, 0));
73 return OK_STATUS();
74}
75
76status_t aon_timer_testutils_watchdog_config(const dif_aon_timer_t *aon_timer,
77 uint32_t bark_cycles,
78 uint32_t bite_cycles,
79 bool pause_in_sleep) {
80 // Make sure that watchdog timer is stopped.
81 TRY(dif_aon_timer_watchdog_stop(aon_timer));
82
83 // Make sure the watchdog IRQ is cleared to avoid false positive.
84 TRY(dif_aon_timer_irq_acknowledge(aon_timer, kDifAonTimerIrqWdogTimerBark));
85 bool is_pending = true;
86 TRY(dif_aon_timer_irq_is_pending(aon_timer, kDifAonTimerIrqWdogTimerBark,
87 &is_pending));
88 TRY_CHECK(!is_pending);
89 TRY(dif_aon_timer_watchdog_start(aon_timer, bark_cycles, bite_cycles,
90 pause_in_sleep, false));
91 return OK_STATUS();
92}
93
94status_t aon_timer_testutils_shutdown(const dif_aon_timer_t *aon_timer) {
95 TRY(dif_aon_timer_wakeup_stop(aon_timer));
96 TRY(dif_aon_timer_watchdog_stop(aon_timer));
97 TRY(dif_aon_timer_clear_wakeup_cause(aon_timer));
98 TRY(dif_aon_timer_irq_acknowledge_all(aon_timer));
99 // Read and verify both timers are actually disabled. This ensures the
100 // synchronization from the core clock to the AON clock domain completed.
101 bool enabled;
102 TRY(dif_aon_timer_wakeup_is_enabled(aon_timer, &enabled));
103 TRY_CHECK(enabled == false);
104 TRY(dif_aon_timer_watchdog_is_enabled(aon_timer, &enabled));
105 TRY_CHECK(enabled == false);
106 return OK_STATUS();
107}