Software APIs
pwrmgr.h
Go to the documentation of this file.
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_PWRMGR_H_
8#define OPENTITAN_DT_PWRMGR_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP pwrmgr and top englishbreakfast.
17 *
18 * This file contains the type definitions and global functions of the pwrmgr.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26
27
28/**
29 * List of instances.
30 */
31typedef enum dt_pwrmgr {
32 kDtPwrmgrFirst = 0, /**< First instance */
33 kDtPwrmgrAon = 0, /**< pwrmgr_aon */
35
36enum {
37 kDtPwrmgrCount = 1, /**< Number of instances */
38};
39
40
41/**
42 * List of register blocks.
43 *
44 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
45 */
46typedef enum dt_pwrmgr_reg_block {
47 kDtPwrmgrRegBlockCore = 0, /**< */
49
50enum {
51 kDtPwrmgrRegBlockCount = 1, /**< Number of register blocks */
52};
53
54
55/** Primary register block (associated with the "primary" set of registers that control the IP). */
56static const dt_pwrmgr_reg_block_t kDtPwrmgrRegBlockPrimary = kDtPwrmgrRegBlockCore;
57
58/**
59 * List of IRQs.
60 *
61 * IRQs are guaranteed to be numbered consecutively from 0.
62 */
63typedef enum dt_pwrmgr_irq {
64 kDtPwrmgrIrqWakeup = 0, /**< Wake from low power state. See wake info for more details */
66
67enum {
68 kDtPwrmgrIrqCount = 1, /**< Number of IRQs */
69};
70
71
72/**
73 * List of clock ports.
74 *
75 * Clock ports are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_pwrmgr_clock {
78 kDtPwrmgrClockClk = 0, /**< Clock port clk_i */
79 kDtPwrmgrClockSlow = 1, /**< Clock port clk_slow_i */
80 kDtPwrmgrClockLc = 2, /**< Clock port clk_lc_i */
81 kDtPwrmgrClockEsc = 3, /**< Clock port clk_esc_i */
83
84enum {
85 kDtPwrmgrClockCount = 4, /**< Number of clock ports */
86};
87
88
89/**
90 * List of reset ports.
91 *
92 * Reset ports are guaranteed to be numbered consecutively from 0.
93 */
94typedef enum dt_pwrmgr_reset {
95 kDtPwrmgrResetRst = 0, /**< Reset port rst_ni */
96 kDtPwrmgrResetMain = 1, /**< Reset port rst_main_ni */
97 kDtPwrmgrResetSlow = 2, /**< Reset port rst_slow_ni */
98 kDtPwrmgrResetLc = 3, /**< Reset port rst_lc_ni */
99 kDtPwrmgrResetEsc = 4, /**< Reset port rst_esc_ni */
101
102enum {
103 kDtPwrmgrResetCount = 5, /**< Number of reset ports */
104};
105
106
107/**
108 * List of supported hardware features.
109 */
110#define OPENTITAN_PWRMGR_HAS_STARTUP_LIFE_CYCLE_INITIALIZATION 1
111#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_IO_IN_LOW_POWER 1
112#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_MAIN_IN_LOW_POWER 1
113#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_IN_LOW_POWER 1
114#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_WHEN_ACTIVE 1
115#define OPENTITAN_PWRMGR_HAS_LOW_POWER_ENTRY 1
116#define OPENTITAN_PWRMGR_HAS_LOW_POWER_DISABLE_POWER 1
117#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_ENABLE 1
118#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_REQUEST 1
119#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_USB_WKUP_REQ_WAKEUP_ENABLE 1
120#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_USB_WKUP_REQ_WAKEUP_REQUEST 1
121#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_ENABLE 1
122#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_REQUEST 1
123#define OPENTITAN_PWRMGR_HAS_LOW_POWER_WAKE_INFO 1
124#define OPENTITAN_PWRMGR_HAS_RESET_CHECK_ROM_INTEGRITY 1
125#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_ENABLE 1
126#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_REQUEST 1
127#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_REQUEST 1
128#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_TIMEOUT 1
129#define OPENTITAN_PWRMGR_HAS_RESET_SW_RST_REQUEST 1
130#define OPENTITAN_PWRMGR_HAS_RESET_MAIN_POWER_GLITCH_RESET 1
131#define OPENTITAN_PWRMGR_HAS_RESET_NDM_RESET_REQUEST 1
132#define OPENTITAN_PWRMGR_HAS_RESET_POR_REQUEST 1
133
134
135
136/**
137 * Get the pwrmgr instance from an instance ID
138 *
139 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
140 *
141 * @param inst_id Instance ID.
142 * @return A pwrmgr instance.
143 *
144 * **Note:** This function only makes sense if the instance ID has device type pwrmgr,
145 * otherwise the returned value is unspecified.
146 */
148
149/**
150 * Get the instance ID of an instance.
151 *
152 * @param dt Instance of pwrmgr.
153 * @return The instance ID of that instance.
154 */
156
157/**
158 * Get the register base address of an instance.
159 *
160 * @param dt Instance of pwrmgr.
161 * @param reg_block The register block requested.
162 * @return The register base address of the requested block.
163 */
164uint32_t dt_pwrmgr_reg_block(
165 dt_pwrmgr_t dt,
166 dt_pwrmgr_reg_block_t reg_block);
167
168/**
169 * Get the primary register base address of an instance.
170 *
171 * This is just a convenience function, equivalent to
172 * `dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore)`
173 *
174 * @param dt Instance of pwrmgr.
175 * @return The register base address of the primary register block.
176 */
177static inline uint32_t dt_pwrmgr_primary_reg_block(
178 dt_pwrmgr_t dt) {
179 return dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore);
180}
181
182/**
183 * Get the PLIC ID of a pwrmgr IRQ for a given instance.
184 *
185 * If the instance is not connected to the PLIC, this function
186 * will return `kDtPlicIrqIdNone`.
187 *
188 * @param dt Instance of pwrmgr.
189 * @param irq A pwrmgr IRQ.
190 * @return The PLIC ID of the IRQ of this instance.
191 */
193 dt_pwrmgr_t dt,
194 dt_pwrmgr_irq_t irq);
195
196/**
197 * Convert a global IRQ ID to a local pwrmgr IRQ type.
198 *
199 * @param dt Instance of pwrmgr.
200 * @param irq A PLIC ID that belongs to this instance.
201 * @return The pwrmgr IRQ, or `kDtPwrmgrIrqCount`.
202 *
203 * **Note:** This function assumes that the PLIC ID belongs to the instance
204 * of pwrmgr passed in parameter. In other words, it must be the case that
205 * `dt_pwrmgr_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
206 * will return `kDtPwrmgrIrqCount`.
207 */
209 dt_pwrmgr_t dt,
210 dt_plic_irq_id_t irq);
211
212
213
214
215/**
216 * Get the clock signal connected to a clock port of an instance.
217 *
218 * @param dt Instance of pwrmgr.
219 * @param clk Clock port.
220 * @return Clock signal.
221 */
223 dt_pwrmgr_t dt,
225
226/**
227 * Get the reset signal connected to a reset port of an instance.
228 *
229 * @param dt Instance of pwrmgr.
230 * @param rst Reset port.
231 * @return Reset signal.
232 */
234 dt_pwrmgr_t dt,
236
237
238
239/**
240 * Description of a wakeup source.
241 *
242 * A wakeup source is always identified by the instance ID of the module where it comes from.
243 * Some instances can have several wakeup signals, e.g. the pinmux has two (`pin` and `usb`).
244 * For such IPs, it is not sufficient to know the instance, we also need to know which
245 * signal triggered the wakeup. The `wakeup` index can be used to distinguish between those.
246 * This value should be casted to the `dt_<ip>_wakeup_t` type of the corresponding IP.
247 * For example, if the `pwrmgr` has two `pinmux` wakeup sources as described above, it's
248 * two wakeup sources will be described as follows:
249 * ```c
250 * {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupPinWkupReq}, // for `pin`
251 * {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupUsbWkupReq}, // for `usb`
252 * ```
253 */
254typedef struct dt_pwrmgr_wakeup_src {
255 dt_instance_id_t inst_id; /**< Instance ID of the source of this wakeup. */
256 size_t wakeup; /**< Index of the wakeup signal for that instance. */
258
259
260/**
261 * Get the number of wakeup sources.
262 *
263 * @param dt Instance of pwrmgr.
264 * @return Number of wakeup sources.
265 */
267
268/**
269 * Get the description of a wakeup source.
270 *
271 * The wakeup sources are ordered as they appear in the registers.
272 *
273 * @param dt Instance of pwrmgr.
274 * @param idx Index of the wakeup source, between 0 and `dt_pwrmgr_wakeup_src_count(dt)-1`.
275 * @return Description of the source.
276 */
278
279/**
280 * Description of a reset request source.
281 *
282 * A reset request source is always identified by the instance ID of the module where it comes
283 * from. In principle, some instances could have several reset requests. If this is the case,
284 * the `rst_req` can be used to distinguish between those. It should be cast to the
285 * `dt_<ip>_reset_req_t` type of the corresponding IP.
286 */
287typedef struct dt_pwrmgr_reset_req_src {
288 dt_instance_id_t inst_id; /**< Instance ID of the source of this reset request. */
289 size_t reset_req; /**< Index of the reset request signal for that instance. */
291
292
293/**
294 * Get the number of peripheral reset requests.
295 *
296 * @param dt Instance of pwrmgr.
297 * @return Number of reset requests.
298 */
300
301/**
302 * Get the description of a reset request.
303 *
304 * The reset requests are ordered as they appear in the registers.
305 *
306 * @param dt Instance of pwrmgr.
307 * @param idx Index of the reset request source, between 0 and
308 * `dt_pwrmgr_reset_request_src_count(dt)-1`.
309 * @return Description of the reset.
310 */
312
313
314
315#ifdef __cplusplus
316} // extern "C"
317#endif // __cplusplus
318
319#endif // OPENTITAN_DT_PWRMGR_H_