Software APIs
dt_uart.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_UART_H_
8#define OPENTITAN_DT_UART_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP uart and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the uart.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_uart {
24 kDtUart0 = 0, /**< uart0 */
25 kDtUart1 = 1, /**< uart1 */
26 kDtUartFirst = 0, /**< \internal First instance */
27 kDtUartCount = 2, /**< \internal Number of instances */
29
30/**
31 * List of register blocks.
32 *
33 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
34 */
35typedef enum dt_uart_reg_block {
36 kDtUartRegBlockCore = 0, /**< */
37 kDtUartRegBlockCount = 1, /**< \internal Number of register blocks */
39
40/** Primary register block (associated with the "primary" set of registers that control the IP). */
41static const dt_uart_reg_block_t kDtUartRegBlockPrimary = kDtUartRegBlockCore;
42
43/**
44 * List of IRQs.
45 *
46 * IRQs are guaranteed to be numbered consecutively from 0.
47 */
48typedef enum dt_uart_irq {
49 kDtUartIrqTxWatermark = 0, /**< raised if the transmit FIFO is past the high-water mark. */
50 kDtUartIrqRxWatermark = 1, /**< raised if the receive FIFO is past the high-water mark. */
51 kDtUartIrqTxDone = 2, /**< raised if the transmit FIFO has emptied and no transmit is ongoing. */
52 kDtUartIrqRxOverflow = 3, /**< raised if the receive FIFO has overflowed. */
53 kDtUartIrqRxFrameErr = 4, /**< raised if a framing error has been detected on receive. */
54 kDtUartIrqRxBreakErr = 5, /**< raised if break condition has been detected on receive. */
55 kDtUartIrqRxTimeout = 6, /**< raised if RX FIFO has characters remaining in the FIFO without being
56retrieved for the programmed time period. */
57 kDtUartIrqRxParityErr = 7, /**< raised if the receiver has detected a parity error. */
58 kDtUartIrqTxEmpty = 8, /**< raised if the transmit FIFO is empty. */
59 kDtUartIrqCount = 9, /**< \internal Number of IRQs */
61
62/**
63 * List of clock ports.
64 *
65 * Clock ports are guaranteed to be numbered consecutively from 0.
66 */
67typedef enum dt_uart_clock {
68 kDtUartClockClk = 0, /**< Clock port clk_i */
69 kDtUartClockCount = 1, /**< \internal Number of clock ports */
71
72/**
73 * List of reset ports.
74 *
75 * Reset ports are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_uart_reset {
78 kDtUartResetRst = 0, /**< Reset port rst_ni */
79 kDtUartResetCount = 1, /**< \internal Number of reset ports */
81
82/**
83 * List of peripheral I/O.
84 *
85 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
86 */
87typedef enum dt_uart_periph_io {
88 kDtUartPeriphIoRx = 0, /**< */
89 kDtUartPeriphIoTx = 1, /**< */
90 kDtUartPeriphIoCount = 2, /**< \internal Number of peripheral I/O */
92
93/**
94 * List of supported hardware features.
95 */
96#define OPENTITAN_UART_HAS_PARITY 1
97#define OPENTITAN_UART_HAS_LINE_LOOPBACK 1
98#define OPENTITAN_UART_HAS_SYSTEM_LOOPBACK 1
99#define OPENTITAN_UART_HAS_BAUD_RATE_CONTROL 1
100#define OPENTITAN_UART_HAS_LINE_BREAK 1
101#define OPENTITAN_UART_HAS_FIFO_INTERRUPTS 1
102
103
104
105/**
106 * Get the uart instance from an instance ID
107 *
108 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
109 *
110 * @param inst_id Instance ID.
111 * @return A uart instance.
112 *
113 * **Note:** This function only makes sense if the instance ID has device type uart,
114 * otherwise the returned value is unspecified.
115 */
117
118/**
119 * Get the instance ID of an instance.
120 *
121 * @param dt Instance of uart.
122 * @return The instance ID of that instance.
123 */
125
126/**
127 * Get the register base address of an instance.
128 *
129 * @param dt Instance of uart.
130 * @param reg_block The register block requested.
131 * @return The register base address of the requested block.
132 */
133uint32_t dt_uart_reg_block(
134 dt_uart_t dt,
135 dt_uart_reg_block_t reg_block);
136
137/**
138 * Get the primary register base address of an instance.
139 *
140 * This is just a convenience function, equivalent to
141 * `dt_uart_reg_block(dt, kDtUartRegBlockCore)`
142 *
143 * @param dt Instance of uart.
144 * @return The register base address of the primary register block.
145 */
146static inline uint32_t dt_uart_primary_reg_block(
147 dt_uart_t dt) {
148 return dt_uart_reg_block(dt, kDtUartRegBlockCore);
149}
150
151/**
152 * Get the PLIC ID of a uart IRQ for a given instance.
153 *
154 * If the instance is not connected to the PLIC, this function
155 * will return `kDtPlicIrqIdNone`.
156 *
157 * @param dt Instance of uart.
158 * @param irq A uart IRQ.
159 * @return The PLIC ID of the IRQ of this instance.
160 */
162 dt_uart_t dt,
163 dt_uart_irq_t irq);
164
165/**
166 * Convert a global IRQ ID to a local uart IRQ type.
167 *
168 * @param dt Instance of uart.
169 * @param irq A PLIC ID that belongs to this instance.
170 * @return The uart IRQ, or `kDtUartIrqCount`.
171 *
172 * **Note:** This function assumes that the PLIC ID belongs to the instance
173 * of uart passed in parameter. In other words, it must be the case that
174 * `dt_uart_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
175 * will return `kDtUartIrqCount`.
176 */
178 dt_uart_t dt,
179 dt_plic_irq_id_t irq);
180
181
182
183/**
184 * Get the peripheral I/O description of an instance.
185 *
186 * @param dt Instance of uart.
187 * @param sig Requested peripheral I/O.
188 * @return Description of the requested peripheral I/O for this instance.
189 */
191 dt_uart_t dt,
193
194/**
195 * Get the clock signal connected to a clock port of an instance.
196 *
197 * @param dt Instance of uart.
198 * @param clk Clock port.
199 * @return Clock signal.
200 */
202 dt_uart_t dt,
203 dt_uart_clock_t clk);
204
205/**
206 * Get the reset signal connected to a reset port of an instance.
207 *
208 * @param dt Instance of uart.
209 * @param rst Reset port.
210 * @return Reset signal.
211 */
213 dt_uart_t dt,
214 dt_uart_reset_t rst);
215
216
217
218#endif // OPENTITAN_DT_UART_H_