Software APIs
dt_uart.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_UART_H_
8#define OPENTITAN_DT_UART_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP uart and top englishbreakfast.
17 *
18 * This file contains the type definitions and global functions of the uart.
19 */
20
21#include "hw/top/dt/dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_uart {
30 kDtUart0 = 0, /**< uart0 */
31 kDtUart1 = 1, /**< uart1 */
32 kDtUartFirst = 0, /**< \internal First instance */
33 kDtUartCount = 2, /**< \internal Number of instances */
35
36/**
37 * List of register blocks.
38 *
39 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
40 */
41typedef enum dt_uart_reg_block {
42 kDtUartRegBlockCore = 0, /**< */
43 kDtUartRegBlockCount = 1, /**< \internal Number of register blocks */
45
46/**
47 * List of memories.
48 *
49 * Memories are guaranteed to start at 0 and to be consecutively numbered.
50 */
51typedef enum dt_uart_memory {
52 kDtUartMemoryCount = 0, /**< \internal Number of memories */
54
55/** Primary register block (associated with the "primary" set of registers that control the IP). */
56static const dt_uart_reg_block_t kDtUartRegBlockPrimary = kDtUartRegBlockCore;
57
58/**
59 * List of IRQs.
60 *
61 * IRQs are guaranteed to be numbered consecutively from 0.
62 */
63typedef enum dt_uart_irq {
64 kDtUartIrqTxWatermark = 0, /**< raised if the transmit FIFO is past the high-water mark. */
65 kDtUartIrqRxWatermark = 1, /**< raised if the receive FIFO is past the high-water mark. */
66 kDtUartIrqTxDone = 2, /**< raised if the transmit FIFO has emptied and no transmit is ongoing. */
67 kDtUartIrqRxOverflow = 3, /**< raised if the receive FIFO has overflowed. */
68 kDtUartIrqRxFrameErr = 4, /**< raised if a framing error has been detected on receive. */
69 kDtUartIrqRxBreakErr = 5, /**< raised if break condition has been detected on receive. */
70 kDtUartIrqRxTimeout = 6, /**< raised if RX FIFO has characters remaining in the FIFO without being
71retrieved for the programmed time period. */
72 kDtUartIrqRxParityErr = 7, /**< raised if the receiver has detected a parity error. */
73 kDtUartIrqTxEmpty = 8, /**< raised if the transmit FIFO is empty. */
74 kDtUartIrqCount = 9, /**< \internal Number of IRQs */
76
77/**
78 * List of clock ports.
79 *
80 * Clock ports are guaranteed to be numbered consecutively from 0.
81 */
82typedef enum dt_uart_clock {
83 kDtUartClockClk = 0, /**< Clock port clk_i */
84 kDtUartClockCount = 1, /**< \internal Number of clock ports */
86
87/**
88 * List of reset ports.
89 *
90 * Reset ports are guaranteed to be numbered consecutively from 0.
91 */
92typedef enum dt_uart_reset {
93 kDtUartResetRst = 0, /**< Reset port rst_ni */
94 kDtUartResetCount = 1, /**< \internal Number of reset ports */
96
97/**
98 * List of peripheral I/O.
99 *
100 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
101 */
102typedef enum dt_uart_periph_io {
103 kDtUartPeriphIoRx = 0, /**< */
104 kDtUartPeriphIoTx = 1, /**< */
105 kDtUartPeriphIoCount = 2, /**< \internal Number of peripheral I/O */
107
108/**
109 * List of supported hardware features.
110 */
111#define OPENTITAN_UART_HAS_PARITY 1
112#define OPENTITAN_UART_HAS_LINE_LOOPBACK 1
113#define OPENTITAN_UART_HAS_SYSTEM_LOOPBACK 1
114#define OPENTITAN_UART_HAS_BAUD_RATE_CONTROL 1
115#define OPENTITAN_UART_HAS_LINE_BREAK 1
116#define OPENTITAN_UART_HAS_FIFO_INTERRUPTS 1
117
118
119
120/**
121 * Get the uart instance from an instance ID
122 *
123 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
124 *
125 * @param inst_id Instance ID.
126 * @return A uart instance.
127 *
128 * **Note:** This function only makes sense if the instance ID has device type uart,
129 * otherwise the returned value is unspecified.
130 */
132
133/**
134 * Get the instance ID of an instance.
135 *
136 * @param dt Instance of uart.
137 * @return The instance ID of that instance.
138 */
140
141/**
142 * Get the register base address of an instance.
143 *
144 * @param dt Instance of uart.
145 * @param reg_block The register block requested.
146 * @return The register base address of the requested block.
147 */
148uint32_t dt_uart_reg_block(
149 dt_uart_t dt,
150 dt_uart_reg_block_t reg_block);
151
152/**
153 * Get the primary register base address of an instance.
154 *
155 * This is just a convenience function, equivalent to
156 * `dt_uart_reg_block(dt, kDtUartRegBlockCore)`
157 *
158 * @param dt Instance of uart.
159 * @return The register base address of the primary register block.
160 */
161static inline uint32_t dt_uart_primary_reg_block(
162 dt_uart_t dt) {
163 return dt_uart_reg_block(dt, kDtUartRegBlockCore);
164}
165
166/**
167 * Get the base address of a memory.
168 *
169 * @param dt Instance of uart.
170 * @param mem The memory requested.
171 * @return The base address of the requested memory.
172 */
173uint32_t dt_uart_memory_base(
174 dt_uart_t dt,
175 dt_uart_memory_t mem);
176
177/**
178 * Get the size of a memory.
179 *
180 * @param dt Instance of uart.
181 * @param mem The memory requested.
182 * @return The size of the requested memory.
183 */
184uint32_t dt_uart_memory_size(
185 dt_uart_t dt,
186 dt_uart_memory_t mem);
187
188/**
189 * Get the PLIC ID of a uart IRQ for a given instance.
190 *
191 * If the instance is not connected to the PLIC, this function
192 * will return `kDtPlicIrqIdNone`.
193 *
194 * @param dt Instance of uart.
195 * @param irq A uart IRQ.
196 * @return The PLIC ID of the IRQ of this instance.
197 */
199 dt_uart_t dt,
200 dt_uart_irq_t irq);
201
202/**
203 * Convert a global IRQ ID to a local uart IRQ type.
204 *
205 * @param dt Instance of uart.
206 * @param irq A PLIC ID that belongs to this instance.
207 * @return The uart IRQ, or `kDtUartIrqCount`.
208 *
209 * **Note:** This function assumes that the PLIC ID belongs to the instance
210 * of uart passed in parameter. In other words, it must be the case that
211 * `dt_uart_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
212 * will return `kDtUartIrqCount`.
213 */
215 dt_uart_t dt,
216 dt_plic_irq_id_t irq);
217
218
219
220/**
221 * Get the peripheral I/O description of an instance.
222 *
223 * @param dt Instance of uart.
224 * @param sig Requested peripheral I/O.
225 * @return Description of the requested peripheral I/O for this instance.
226 */
228 dt_uart_t dt,
230
231/**
232 * Get the clock signal connected to a clock port of an instance.
233 *
234 * @param dt Instance of uart.
235 * @param clk Clock port.
236 * @return Clock signal.
237 */
239 dt_uart_t dt,
240 dt_uart_clock_t clk);
241
242/**
243 * Get the reset signal connected to a reset port of an instance.
244 *
245 * @param dt Instance of uart.
246 * @param rst Reset port.
247 * @return Reset signal.
248 */
250 dt_uart_t dt,
251 dt_uart_reset_t rst);
252
253
254
255#ifdef __cplusplus
256} // extern "C"
257#endif // __cplusplus
258
259#endif // OPENTITAN_DT_UART_H_