Software APIs
dt_uart.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_UART_H_
8#define OPENTITAN_DT_UART_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP uart and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the uart.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_uart {
26 kDtUart0 = 0, /**< uart0 */
27 kDtUart1 = 1, /**< uart1 */
28 kDtUartFirst = 0, /**< \internal First instance */
29 kDtUartCount = 2, /**< \internal Number of instances */
31
32/**
33 * List of register blocks.
34 *
35 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
36 */
37typedef enum dt_uart_reg_block {
38 kDtUartRegBlockCore = 0, /**< */
39 kDtUartRegBlockCount = 1, /**< \internal Number of register blocks */
41
42/** Primary register block (associated with the "primary" set of registers that control the IP). */
43static const dt_uart_reg_block_t kDtUartRegBlockPrimary = kDtUartRegBlockCore;
44
45/**
46 * List of IRQs.
47 *
48 * IRQs are guaranteed to be numbered consecutively from 0.
49 */
50typedef enum dt_uart_irq {
51 kDtUartIrqTxWatermark = 0, /**< raised if the transmit FIFO is past the high-water mark. */
52 kDtUartIrqRxWatermark = 1, /**< raised if the receive FIFO is past the high-water mark. */
53 kDtUartIrqTxDone = 2, /**< raised if the transmit FIFO has emptied and no transmit is ongoing. */
54 kDtUartIrqRxOverflow = 3, /**< raised if the receive FIFO has overflowed. */
55 kDtUartIrqRxFrameErr = 4, /**< raised if a framing error has been detected on receive. */
56 kDtUartIrqRxBreakErr = 5, /**< raised if break condition has been detected on receive. */
57 kDtUartIrqRxTimeout = 6, /**< raised if RX FIFO has characters remaining in the FIFO without being
58retrieved for the programmed time period. */
59 kDtUartIrqRxParityErr = 7, /**< raised if the receiver has detected a parity error. */
60 kDtUartIrqTxEmpty = 8, /**< raised if the transmit FIFO is empty. */
61 kDtUartIrqCount = 9, /**< \internal Number of IRQs */
63
64/**
65 * List of clock ports.
66 *
67 * Clock ports are guaranteed to be numbered consecutively from 0.
68 */
69typedef enum dt_uart_clock {
70 kDtUartClockClk = 0, /**< Clock port clk_i */
71 kDtUartClockCount = 1, /**< \internal Number of clock ports */
73
74/**
75 * List of reset ports.
76 *
77 * Reset ports are guaranteed to be numbered consecutively from 0.
78 */
79typedef enum dt_uart_reset {
80 kDtUartResetRst = 0, /**< Reset port rst_ni */
81 kDtUartResetCount = 1, /**< \internal Number of reset ports */
83
84/**
85 * List of peripheral I/O.
86 *
87 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
88 */
89typedef enum dt_uart_periph_io {
90 kDtUartPeriphIoRx = 0, /**< */
91 kDtUartPeriphIoTx = 1, /**< */
92 kDtUartPeriphIoCount = 2, /**< \internal Number of peripheral I/O */
94
95/**
96 * List of supported hardware features.
97 */
98#define OPENTITAN_UART_HAS_PARITY 1
99#define OPENTITAN_UART_HAS_LINE_LOOPBACK 1
100#define OPENTITAN_UART_HAS_SYSTEM_LOOPBACK 1
101#define OPENTITAN_UART_HAS_BAUD_RATE_CONTROL 1
102#define OPENTITAN_UART_HAS_LINE_BREAK 1
103#define OPENTITAN_UART_HAS_FIFO_INTERRUPTS 1
104
105
106
107/**
108 * Get the uart instance from an instance ID
109 *
110 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
111 *
112 * @param inst_id Instance ID.
113 * @return A uart instance.
114 *
115 * **Note:** This function only makes sense if the instance ID has device type uart,
116 * otherwise the returned value is unspecified.
117 */
119
120/**
121 * Get the instance ID of an instance.
122 *
123 * @param dt Instance of uart.
124 * @return The instance ID of that instance.
125 */
127
128/**
129 * Get the register base address of an instance.
130 *
131 * @param dt Instance of uart.
132 * @param reg_block The register block requested.
133 * @return The register base address of the requested block.
134 */
135uint32_t dt_uart_reg_block(
136 dt_uart_t dt,
137 dt_uart_reg_block_t reg_block);
138
139/**
140 * Get the primary register base address of an instance.
141 *
142 * This is just a convenience function, equivalent to
143 * `dt_uart_reg_block(dt, kDtUartRegBlockCore)`
144 *
145 * @param dt Instance of uart.
146 * @return The register base address of the primary register block.
147 */
148static inline uint32_t dt_uart_primary_reg_block(
149 dt_uart_t dt) {
150 return dt_uart_reg_block(dt, kDtUartRegBlockCore);
151}
152
153/**
154 * Get the PLIC ID of a uart IRQ for a given instance.
155 *
156 * If the instance is not connected to the PLIC, this function
157 * will return `kDtPlicIrqIdNone`.
158 *
159 * @param dt Instance of uart.
160 * @param irq A uart IRQ.
161 * @return The PLIC ID of the IRQ of this instance.
162 */
164 dt_uart_t dt,
165 dt_uart_irq_t irq);
166
167/**
168 * Convert a global IRQ ID to a local uart IRQ type.
169 *
170 * @param dt Instance of uart.
171 * @param irq A PLIC ID that belongs to this instance.
172 * @return The uart IRQ, or `kDtUartIrqCount`.
173 *
174 * **Note:** This function assumes that the PLIC ID belongs to the instance
175 * of uart passed in parameter. In other words, it must be the case that
176 * `dt_uart_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
177 * will return `kDtUartIrqCount`.
178 */
180 dt_uart_t dt,
181 dt_plic_irq_id_t irq);
182
183
184
185/**
186 * Get the peripheral I/O description of an instance.
187 *
188 * @param dt Instance of uart.
189 * @param sig Requested peripheral I/O.
190 * @return Description of the requested peripheral I/O for this instance.
191 */
193 dt_uart_t dt,
195
196/**
197 * Get the clock signal connected to a clock port of an instance.
198 *
199 * @param dt Instance of uart.
200 * @param clk Clock port.
201 * @return Clock signal.
202 */
204 dt_uart_t dt,
205 dt_uart_clock_t clk);
206
207/**
208 * Get the reset signal connected to a reset port of an instance.
209 *
210 * @param dt Instance of uart.
211 * @param rst Reset port.
212 * @return Reset signal.
213 */
215 dt_uart_t dt,
216 dt_uart_reset_t rst);
217
218
219
220#endif // OPENTITAN_DT_UART_H_