Software APIs
dt_spi_device.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_SPI_DEVICE_H_
8#define OPENTITAN_DT_SPI_DEVICE_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP spi_device and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the spi_device.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_spi_device {
24 kDtSpiDevice = 0, /**< spi_device */
25 kDtSpiDeviceFirst = 0, /**< \internal First instance */
26 kDtSpiDeviceCount = 1, /**< \internal Number of instances */
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
35 kDtSpiDeviceRegBlockCore = 0, /**< */
36 kDtSpiDeviceRegBlockCount = 1, /**< \internal Number of register blocks */
38
39/** Primary register block (associated with the "primary" set of registers that control the IP). */
40static const dt_spi_device_reg_block_t kDtSpiDeviceRegBlockPrimary = kDtSpiDeviceRegBlockCore;
41
42/**
43 * List of IRQs.
44 *
45 * IRQs are guaranteed to be numbered consecutively from 0.
46 */
47typedef enum dt_spi_device_irq {
48 kDtSpiDeviceIrqUploadCmdfifoNotEmpty = 0, /**< Upload Command FIFO is not empty */
49 kDtSpiDeviceIrqUploadPayloadNotEmpty = 1, /**< Upload payload is not empty.
50
51The event occurs after SPI transaction completed */
52 kDtSpiDeviceIrqUploadPayloadOverflow = 2, /**< Upload payload overflow event.
53
54When a SPI Host system issues a command with payload more than 256B,
55this event is reported. When it happens, SW should read the last
56written payload index CSR to figure out the starting address of the
57last 256B. */
58 kDtSpiDeviceIrqReadbufWatermark = 3, /**< Read Buffer Threshold event.
59
60The host system accesses greater than or equal to the threshold of a
61buffer. */
62 kDtSpiDeviceIrqReadbufFlip = 4, /**< Read buffer flipped event.
63
64The host system accesses other side of buffer. */
65 kDtSpiDeviceIrqTpmHeaderNotEmpty = 5, /**< TPM Header(Command/Address) buffer available */
66 kDtSpiDeviceIrqTpmRdfifoCmdEnd = 6, /**< TPM RdFIFO command ended.
67
68The TPM Read command targeting the RdFIFO ended.
69Check TPM_STATUS.rdfifo_aborted to see if the transaction completed. */
70 kDtSpiDeviceIrqTpmRdfifoDrop = 7, /**< TPM RdFIFO data dropped.
71
72Data was dropped from the RdFIFO.
73Data was written while a read command was not active, and it was not accepted.
74This can occur when the host aborts a read command. */
75 kDtSpiDeviceIrqCount = 8, /**< \internal Number of IRQs */
77
78/**
79 * List of clock ports.
80 *
81 * Clock ports are guaranteed to be numbered consecutively from 0.
82 */
83typedef enum dt_spi_device_clock {
84 kDtSpiDeviceClockClk = 0, /**< Clock port clk_i */
85 kDtSpiDeviceClockCount = 1, /**< \internal Number of clock ports */
87
88/**
89 * List of reset ports.
90 *
91 * Reset ports are guaranteed to be numbered consecutively from 0.
92 */
93typedef enum dt_spi_device_reset {
94 kDtSpiDeviceResetRst = 0, /**< Reset port rst_ni */
95 kDtSpiDeviceResetCount = 1, /**< \internal Number of reset ports */
97
98/**
99 * List of peripheral I/O.
100 *
101 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
102 */
104 kDtSpiDevicePeriphIoSck = 0, /**< */
105 kDtSpiDevicePeriphIoCsb = 1, /**< */
106 kDtSpiDevicePeriphIoTpmCsb = 2, /**< */
107 kDtSpiDevicePeriphIoSd0 = 3, /**< */
108 kDtSpiDevicePeriphIoSd1 = 4, /**< */
109 kDtSpiDevicePeriphIoSd2 = 5, /**< */
110 kDtSpiDevicePeriphIoSd3 = 6, /**< */
111 kDtSpiDevicePeriphIoCount = 7, /**< \internal Number of peripheral I/O */
113
114/**
115 * List of supported hardware features.
116 */
117#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION 1
118#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH 1
119#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM 1
120#define OPENTITAN_SPI_DEVICE_HAS_HW_LANES 1
121#define OPENTITAN_SPI_DEVICE_HAS_HW_SERDES_ORDERING 1
122#define OPENTITAN_SPI_DEVICE_HAS_HW_CSB_STATUS 1
123#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_COMMANDS 1
124#define OPENTITAN_SPI_DEVICE_HAS_HW_FLASH_EMULATION_BLOCKS 1
125#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_READ_COMMAND_PROCESSOR 1
126#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_DUMMY_CYCLE 1
127#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_WRITE_ENABLE_DISABLE 1
128#define OPENTITAN_SPI_DEVICE_HAS_HW_LAST_READ_ADDR 1
129#define OPENTITAN_SPI_DEVICE_HAS_HW_CMDINFOS 1
130#define OPENTITAN_SPI_DEVICE_HAS_HW_COMMAND_UPLOAD 1
131#define OPENTITAN_SPI_DEVICE_HAS_HW_3B4B_ADDRESSING 1
132#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_CMD_FILTER 1
133#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_ADDRESS_MANIPULATION 1
134#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_STATUS_MANIPULATION 1
135#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_OUTPUT_ENABLE_CONTROL 1
136#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_INTERCEPT_EN 1
137#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_MAILBOX 1
138#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_RETURN_BY_HW_REGS 1
139#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_AUTO_WAIT 1
140#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_READ_FIFO_MODE 1
141#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_CAPABILITY 1
142
143
144
145/**
146 * Get the spi_device instance from an instance ID
147 *
148 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
149 *
150 * @param inst_id Instance ID.
151 * @return A spi_device instance.
152 *
153 * **Note:** This function only makes sense if the instance ID has device type spi_device,
154 * otherwise the returned value is unspecified.
155 */
157
158/**
159 * Get the instance ID of an instance.
160 *
161 * @param dt Instance of spi_device.
162 * @return The instance ID of that instance.
163 */
165
166/**
167 * Get the register base address of an instance.
168 *
169 * @param dt Instance of spi_device.
170 * @param reg_block The register block requested.
171 * @return The register base address of the requested block.
172 */
175 dt_spi_device_reg_block_t reg_block);
176
177/**
178 * Get the primary register base address of an instance.
179 *
180 * This is just a convenience function, equivalent to
181 * `dt_spi_device_reg_block(dt, kDtSpiDeviceRegBlockCore)`
182 *
183 * @param dt Instance of spi_device.
184 * @return The register base address of the primary register block.
185 */
186static inline uint32_t dt_spi_device_primary_reg_block(
187 dt_spi_device_t dt) {
188 return dt_spi_device_reg_block(dt, kDtSpiDeviceRegBlockCore);
189}
190
191/**
192 * Get the PLIC ID of a spi_device IRQ for a given instance.
193 *
194 * If the instance is not connected to the PLIC, this function
195 * will return `kDtPlicIrqIdNone`.
196 *
197 * @param dt Instance of spi_device.
198 * @param irq A spi_device IRQ.
199 * @return The PLIC ID of the IRQ of this instance.
200 */
204
205/**
206 * Convert a global IRQ ID to a local spi_device IRQ type.
207 *
208 * @param dt Instance of spi_device.
209 * @param irq A PLIC ID that belongs to this instance.
210 * @return The spi_device IRQ, or `kDtSpiDeviceIrqCount`.
211 *
212 * **Note:** This function assumes that the PLIC ID belongs to the instance
213 * of spi_device passed in parameter. In other words, it must be the case that
214 * `dt_spi_device_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
215 * will return `kDtSpiDeviceIrqCount`.
216 */
219 dt_plic_irq_id_t irq);
220
221
222
223/**
224 * Get the peripheral I/O description of an instance.
225 *
226 * @param dt Instance of spi_device.
227 * @param sig Requested peripheral I/O.
228 * @return Description of the requested peripheral I/O for this instance.
229 */
233
234/**
235 * Get the clock signal connected to a clock port of an instance.
236 *
237 * @param dt Instance of spi_device.
238 * @param clk Clock port.
239 * @return Clock signal.
240 */
244
245/**
246 * Get the reset signal connected to a reset port of an instance.
247 *
248 * @param dt Instance of spi_device.
249 * @param rst Reset port.
250 * @return Reset signal.
251 */
255
256
257
258#endif // OPENTITAN_DT_SPI_DEVICE_H_