Software APIs
dt_rv_plic.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RV_PLIC_H_
8#define OPENTITAN_DT_RV_PLIC_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP rv_plic and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the rv_plic.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_rv_plic {
26 kDtRvPlic = 0, /**< rv_plic */
27 kDtRvPlicFirst = 0, /**< \internal First instance */
28 kDtRvPlicCount = 1, /**< \internal Number of instances */
30
31/**
32 * List of register blocks.
33 *
34 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
35 */
37 kDtRvPlicRegBlockCore = 0, /**< */
38 kDtRvPlicRegBlockCount = 1, /**< \internal Number of register blocks */
40
41/** Primary register block (associated with the "primary" set of registers that control the IP). */
42static const dt_rv_plic_reg_block_t kDtRvPlicRegBlockPrimary = kDtRvPlicRegBlockCore;
43
44/**
45 * List of clock ports.
46 *
47 * Clock ports are guaranteed to be numbered consecutively from 0.
48 */
49typedef enum dt_rv_plic_clock {
50 kDtRvPlicClockClk = 0, /**< Clock port clk_i */
51 kDtRvPlicClockCount = 1, /**< \internal Number of clock ports */
53
54/**
55 * List of reset ports.
56 *
57 * Reset ports are guaranteed to be numbered consecutively from 0.
58 */
59typedef enum dt_rv_plic_reset {
60 kDtRvPlicResetRst = 0, /**< Reset port rst_ni */
61 kDtRvPlicResetCount = 1, /**< \internal Number of reset ports */
63
64/**
65 * List of supported hardware features.
66 */
67#define OPENTITAN_RV_PLIC_HAS_PRIORITY 1
68#define OPENTITAN_RV_PLIC_HAS_ENABLE 1
69
70
71
72/**
73 * Get the rv_plic instance from an instance ID
74 *
75 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
76 *
77 * @param inst_id Instance ID.
78 * @return A rv_plic instance.
79 *
80 * **Note:** This function only makes sense if the instance ID has device type rv_plic,
81 * otherwise the returned value is unspecified.
82 */
84
85/**
86 * Get the instance ID of an instance.
87 *
88 * @param dt Instance of rv_plic.
89 * @return The instance ID of that instance.
90 */
92
93/**
94 * Get the register base address of an instance.
95 *
96 * @param dt Instance of rv_plic.
97 * @param reg_block The register block requested.
98 * @return The register base address of the requested block.
99 */
100uint32_t dt_rv_plic_reg_block(
101 dt_rv_plic_t dt,
102 dt_rv_plic_reg_block_t reg_block);
103
104/**
105 * Get the primary register base address of an instance.
106 *
107 * This is just a convenience function, equivalent to
108 * `dt_rv_plic_reg_block(dt, kDtRvPlicRegBlockCore)`
109 *
110 * @param dt Instance of rv_plic.
111 * @return The register base address of the primary register block.
112 */
113static inline uint32_t dt_rv_plic_primary_reg_block(
114 dt_rv_plic_t dt) {
115 return dt_rv_plic_reg_block(dt, kDtRvPlicRegBlockCore);
116}
117
118
119
120
121/**
122 * Get the clock signal connected to a clock port of an instance.
123 *
124 * @param dt Instance of rv_plic.
125 * @param clk Clock port.
126 * @return Clock signal.
127 */
129 dt_rv_plic_t dt,
131
132/**
133 * Get the reset signal connected to a reset port of an instance.
134 *
135 * @param dt Instance of rv_plic.
136 * @param rst Reset port.
137 * @return Reset signal.
138 */
140 dt_rv_plic_t dt,
142
143
144
145#endif // OPENTITAN_DT_RV_PLIC_H_