Software APIs
dt_rv_plic.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RV_PLIC_H_
8#define OPENTITAN_DT_RV_PLIC_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP rv_plic and top englishbreakfast.
17 *
18 * This file contains the type definitions and global functions of the rv_plic.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_rv_plic {
30 kDtRvPlic = 0, /**< rv_plic */
31 kDtRvPlicFirst = 0, /**< \internal First instance */
32 kDtRvPlicCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
41 kDtRvPlicRegBlockCore = 0, /**< */
42 kDtRvPlicRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/** Primary register block (associated with the "primary" set of registers that control the IP). */
46static const dt_rv_plic_reg_block_t kDtRvPlicRegBlockPrimary = kDtRvPlicRegBlockCore;
47
48/**
49 * List of clock ports.
50 *
51 * Clock ports are guaranteed to be numbered consecutively from 0.
52 */
53typedef enum dt_rv_plic_clock {
54 kDtRvPlicClockClk = 0, /**< Clock port clk_i */
55 kDtRvPlicClockCount = 1, /**< \internal Number of clock ports */
57
58/**
59 * List of reset ports.
60 *
61 * Reset ports are guaranteed to be numbered consecutively from 0.
62 */
63typedef enum dt_rv_plic_reset {
64 kDtRvPlicResetRst = 0, /**< Reset port rst_ni */
65 kDtRvPlicResetCount = 1, /**< \internal Number of reset ports */
67
68/**
69 * List of supported hardware features.
70 */
71#define OPENTITAN_RV_PLIC_HAS_PRIORITY 1
72#define OPENTITAN_RV_PLIC_HAS_ENABLE 1
73
74
75
76/**
77 * Get the rv_plic instance from an instance ID
78 *
79 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
80 *
81 * @param inst_id Instance ID.
82 * @return A rv_plic instance.
83 *
84 * **Note:** This function only makes sense if the instance ID has device type rv_plic,
85 * otherwise the returned value is unspecified.
86 */
88
89/**
90 * Get the instance ID of an instance.
91 *
92 * @param dt Instance of rv_plic.
93 * @return The instance ID of that instance.
94 */
96
97/**
98 * Get the register base address of an instance.
99 *
100 * @param dt Instance of rv_plic.
101 * @param reg_block The register block requested.
102 * @return The register base address of the requested block.
103 */
104uint32_t dt_rv_plic_reg_block(
105 dt_rv_plic_t dt,
106 dt_rv_plic_reg_block_t reg_block);
107
108/**
109 * Get the primary register base address of an instance.
110 *
111 * This is just a convenience function, equivalent to
112 * `dt_rv_plic_reg_block(dt, kDtRvPlicRegBlockCore)`
113 *
114 * @param dt Instance of rv_plic.
115 * @return The register base address of the primary register block.
116 */
117static inline uint32_t dt_rv_plic_primary_reg_block(
118 dt_rv_plic_t dt) {
119 return dt_rv_plic_reg_block(dt, kDtRvPlicRegBlockCore);
120}
121
122
123
124
125/**
126 * Get the clock signal connected to a clock port of an instance.
127 *
128 * @param dt Instance of rv_plic.
129 * @param clk Clock port.
130 * @return Clock signal.
131 */
133 dt_rv_plic_t dt,
135
136/**
137 * Get the reset signal connected to a reset port of an instance.
138 *
139 * @param dt Instance of rv_plic.
140 * @param rst Reset port.
141 * @return Reset signal.
142 */
144 dt_rv_plic_t dt,
146
147
148
149#ifdef __cplusplus
150} // extern "C"
151#endif // __cplusplus
152
153#endif // OPENTITAN_DT_RV_PLIC_H_