Software APIs
dt_rom_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_ROM_CTRL_H_
8#define OPENTITAN_DT_ROM_CTRL_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP rom_ctrl and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the rom_ctrl.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_rom_ctrl {
26 kDtRomCtrl = 0, /**< rom_ctrl */
27 kDtRomCtrlFirst = 0, /**< \internal First instance */
28 kDtRomCtrlCount = 1, /**< \internal Number of instances */
30
31/**
32 * List of register blocks.
33 *
34 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
35 */
37 kDtRomCtrlRegBlockRegs = 0, /**< */
38 kDtRomCtrlRegBlockRom = 1, /**< */
39 kDtRomCtrlRegBlockCount = 2, /**< \internal Number of register blocks */
41
42/** Primary register block (associated with the "primary" set of registers that control the IP). */
43static const dt_rom_ctrl_reg_block_t kDtRomCtrlRegBlockPrimary = kDtRomCtrlRegBlockRegs;
44
45/**
46 * List of clock ports.
47 *
48 * Clock ports are guaranteed to be numbered consecutively from 0.
49 */
50typedef enum dt_rom_ctrl_clock {
51 kDtRomCtrlClockClk = 0, /**< Clock port clk_i */
52 kDtRomCtrlClockCount = 1, /**< \internal Number of clock ports */
54
55/**
56 * List of reset ports.
57 *
58 * Reset ports are guaranteed to be numbered consecutively from 0.
59 */
60typedef enum dt_rom_ctrl_reset {
61 kDtRomCtrlResetRst = 0, /**< Reset port rst_ni */
62 kDtRomCtrlResetCount = 1, /**< \internal Number of reset ports */
64
65/**
66 * List of supported hardware features.
67 */
68#define OPENTITAN_ROM_CTRL_HAS_SCRAMBLED 1
69#define OPENTITAN_ROM_CTRL_HAS_DIGESTS 1
70#define OPENTITAN_ROM_CTRL_HAS_EXP_DIGESTS 1
71
72
73
74/**
75 * Get the rom_ctrl instance from an instance ID
76 *
77 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
78 *
79 * @param inst_id Instance ID.
80 * @return A rom_ctrl instance.
81 *
82 * **Note:** This function only makes sense if the instance ID has device type rom_ctrl,
83 * otherwise the returned value is unspecified.
84 */
86
87/**
88 * Get the instance ID of an instance.
89 *
90 * @param dt Instance of rom_ctrl.
91 * @return The instance ID of that instance.
92 */
94
95/**
96 * Get the register base address of an instance.
97 *
98 * @param dt Instance of rom_ctrl.
99 * @param reg_block The register block requested.
100 * @return The register base address of the requested block.
101 */
102uint32_t dt_rom_ctrl_reg_block(
103 dt_rom_ctrl_t dt,
104 dt_rom_ctrl_reg_block_t reg_block);
105
106/**
107 * Get the primary register base address of an instance.
108 *
109 * This is just a convenience function, equivalent to
110 * `dt_rom_ctrl_reg_block(dt, kDtRomCtrlRegBlockRegs)`
111 *
112 * @param dt Instance of rom_ctrl.
113 * @return The register base address of the primary register block.
114 */
115static inline uint32_t dt_rom_ctrl_primary_reg_block(
116 dt_rom_ctrl_t dt) {
117 return dt_rom_ctrl_reg_block(dt, kDtRomCtrlRegBlockRegs);
118}
119
120
121
122
123/**
124 * Get the clock signal connected to a clock port of an instance.
125 *
126 * @param dt Instance of rom_ctrl.
127 * @param clk Clock port.
128 * @return Clock signal.
129 */
131 dt_rom_ctrl_t dt,
133
134/**
135 * Get the reset signal connected to a reset port of an instance.
136 *
137 * @param dt Instance of rom_ctrl.
138 * @param rst Reset port.
139 * @return Reset signal.
140 */
142 dt_rom_ctrl_t dt,
144
145
146
147#endif // OPENTITAN_DT_ROM_CTRL_H_