dt_pwrmgr.h

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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Device table API auto-generated by `dtgen`
 
#ifndef OPENTITAN_DT_PWRMGR_H_
#define OPENTITAN_DT_PWRMGR_H_
 
#ifdef __cplusplus
extern "C" {
#endif  // __cplusplus
 
/**
 * @file
 * @brief Device Tables (DT) for IP pwrmgr and top englishbreakfast.
 *
 * This file contains the type definitions and global functions of the pwrmgr.
 */
 
#include "hw/top/dt/dt_api.h"
#include <stdint.h>
 
 
 
 
 
/**
 * List of instances.
 */
typedef enum dt_pwrmgr {
  kDtPwrmgrAon = 0, /**< pwrmgr_aon */
  kDtPwrmgrFirst = 0, /**< \internal First instance */
  kDtPwrmgrCount = 1, /**< \internal Number of instances */
} dt_pwrmgr_t;
 
/**
 * List of register blocks.
 *
 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_pwrmgr_reg_block {
  kDtPwrmgrRegBlockCore = 0, /**<  */
  kDtPwrmgrRegBlockCount = 1, /**< \internal Number of register blocks */
} dt_pwrmgr_reg_block_t;
 
/** Primary register block (associated with the "primary" set of registers that control the IP). */
static const dt_pwrmgr_reg_block_t kDtPwrmgrRegBlockPrimary = kDtPwrmgrRegBlockCore;
 
/**
 * List of memories.
 *
 * Memories are guaranteed to start at 0 and to be consecutively numbered.
 */
typedef enum dt_pwrmgr_memory {
  kDtPwrmgrMemoryCount = 0, /**< \internal Number of memories */
} dt_pwrmgr_memory_t;
 
/**
 * List of IRQs.
 *
 * IRQs are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwrmgr_irq {
  kDtPwrmgrIrqWakeup = 0, /**< Wake from low power state. See wake info for more details */
  kDtPwrmgrIrqCount = 1, /**< \internal Number of IRQs */
} dt_pwrmgr_irq_t;
 
/**
 * List of clock ports.
 *
 * Clock ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwrmgr_clock {
  kDtPwrmgrClockClk = 0, /**< Clock port clk_i */
  kDtPwrmgrClockSlow = 1, /**< Clock port clk_slow_i */
  kDtPwrmgrClockLc = 2, /**< Clock port clk_lc_i */
  kDtPwrmgrClockEsc = 3, /**< Clock port clk_esc_i */
  kDtPwrmgrClockCount = 4, /**< \internal Number of clock ports */
} dt_pwrmgr_clock_t;
 
/**
 * List of reset ports.
 *
 * Reset ports are guaranteed to be numbered consecutively from 0.
 */
typedef enum dt_pwrmgr_reset {
  kDtPwrmgrResetRst = 0, /**< Reset port rst_ni */
  kDtPwrmgrResetMain = 1, /**< Reset port rst_main_ni */
  kDtPwrmgrResetSlow = 2, /**< Reset port rst_slow_ni */
  kDtPwrmgrResetLc = 3, /**< Reset port rst_lc_ni */
  kDtPwrmgrResetEsc = 4, /**< Reset port rst_esc_ni */
  kDtPwrmgrResetCount = 5, /**< \internal Number of reset ports */
} dt_pwrmgr_reset_t;
 
/**
 * List of supported hardware features.
 */
#define OPENTITAN_PWRMGR_HAS_STARTUP_LIFE_CYCLE_INITIALIZATION 1
#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_IO_IN_LOW_POWER 1
#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_MAIN_IN_LOW_POWER 1
#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_IN_LOW_POWER 1
#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_WHEN_ACTIVE 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_ENTRY 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_DISABLE_POWER 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_ENABLE 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_USB_WKUP_REQ_WAKEUP_ENABLE 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_USB_WKUP_REQ_WAKEUP_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_ENABLE 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_LOW_POWER_WAKE_INFO 1
#define OPENTITAN_PWRMGR_HAS_RESET_CHECK_ROM_INTEGRITY 1
#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_ENABLE 1
#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_TIMEOUT 1
#define OPENTITAN_PWRMGR_HAS_RESET_SW_RST_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_RESET_MAIN_POWER_GLITCH_RESET 1
#define OPENTITAN_PWRMGR_HAS_RESET_NDM_RESET_REQUEST 1
#define OPENTITAN_PWRMGR_HAS_RESET_POR_REQUEST 1
 
 
 
/**
 * Get the pwrmgr instance from an instance ID
 *
 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
 *
 * @param inst_id Instance ID.
 * @return A pwrmgr instance.
 *
 * **Note:** This function only makes sense if the instance ID has device type pwrmgr,
 * otherwise the returned value is unspecified.
 */
dt_pwrmgr_t dt_pwrmgr_from_instance_id(dt_instance_id_t inst_id);
 
/**
 * Get the instance ID of an instance.
 *
 * @param dt Instance of pwrmgr.
 * @return The instance ID of that instance.
 */
dt_instance_id_t dt_pwrmgr_instance_id(dt_pwrmgr_t dt);
 
/**
 * Get the register base address of an instance.
 *
 * @param dt Instance of pwrmgr.
 * @param reg_block The register block requested.
 * @return The register base address of the requested block.
 */
uint32_t dt_pwrmgr_reg_block(
    dt_pwrmgr_t dt,
    dt_pwrmgr_reg_block_t reg_block);
 
/**
 * Get the primary register base address of an instance.
 *
 * This is just a convenience function, equivalent to
 * `dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore)`
 *
 * @param dt Instance of pwrmgr.
 * @return The register base address of the primary register block.
 */
static inline uint32_t dt_pwrmgr_primary_reg_block(
    dt_pwrmgr_t dt) {
  return dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore);
}
 
/**
 * Get the base address of a memory.
 *
 * @param dt Instance of pwrmgr.
 * @param mem The memory requested.
 * @return The base address of the requested memory.
 */
uint32_t dt_pwrmgr_memory_base(
    dt_pwrmgr_t dt,
    dt_pwrmgr_memory_t mem);
 
/**
 * Get the size of a memory.
 *
 * @param dt Instance of pwrmgr.
 * @param mem The memory requested.
 * @return The size of the requested memory.
 */
uint32_t dt_pwrmgr_memory_size(
    dt_pwrmgr_t dt,
    dt_pwrmgr_memory_t mem);
 
/**
 * Get the PLIC ID of a pwrmgr IRQ for a given instance.
 *
 * If the instance is not connected to the PLIC, this function
 * will return `kDtPlicIrqIdNone`.
 *
 * @param dt Instance of pwrmgr.
 * @param irq A pwrmgr IRQ.
 * @return The PLIC ID of the IRQ of this instance.
 */
dt_plic_irq_id_t dt_pwrmgr_irq_to_plic_id(
    dt_pwrmgr_t dt,
    dt_pwrmgr_irq_t irq);
 
/**
 * Convert a global IRQ ID to a local pwrmgr IRQ type.
 *
 * @param dt Instance of pwrmgr.
 * @param irq A PLIC ID that belongs to this instance.
 * @return The pwrmgr IRQ, or `kDtPwrmgrIrqCount`.
 *
 * **Note:** This function assumes that the PLIC ID belongs to the instance
 * of pwrmgr passed in parameter. In other words, it must be the case that
 * `dt_pwrmgr_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
 * will return `kDtPwrmgrIrqCount`.
 */
dt_pwrmgr_irq_t dt_pwrmgr_irq_from_plic_id(
    dt_pwrmgr_t dt,
    dt_plic_irq_id_t irq);
 
 
 
 
/**
 * Get the clock signal connected to a clock port of an instance.
 *
 * @param dt Instance of pwrmgr.
 * @param clk Clock port.
 * @return Clock signal.
 */
dt_clock_t dt_pwrmgr_clock(
    dt_pwrmgr_t dt,
    dt_pwrmgr_clock_t clk);
 
/**
 * Get the reset signal connected to a reset port of an instance.
 *
 * @param dt Instance of pwrmgr.
 * @param rst Reset port.
 * @return Reset signal.
 */
dt_reset_t dt_pwrmgr_reset(
    dt_pwrmgr_t dt,
    dt_pwrmgr_reset_t rst);
 
 
 
/**
 * Description of a wakeup source.
 *
 * A wakeup source is always identified by the instance ID of the module where it comes from.
 * Some instances can have several wakeup signals, e.g. the pinmux has two (`pin` and `usb`).
 * For such IPs, it is not sufficient to know the instance, we also need to know which
 * signal triggered the wakeup. The `wakeup` index can be used to distinguish between those.
 * This value should be casted to the `dt_<ip>_wakeup_t` type of the corresponding IP.
 * For example, if the `pwrmgr` has two `pinmux` wakeup sources as described above, it's
 * two wakeup sources will be described as follows:
 * ```c
 * {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupPinWkupReq}, // for `pin`
 * {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupUsbWkupReq}, // for `usb`
 * ```
 */
typedef struct dt_pwrmgr_wakeup_src {
  dt_instance_id_t inst_id; /**< Instance ID of the source of this wakeup. */
  size_t wakeup; /**< Index of the wakeup signal for that instance. */
} dt_pwrmgr_wakeup_src_t;
 
 
/**
 * Get the number of wakeup sources.
 *
 * @param dt Instance of pwrmgr.
 * @return Number of wakeup sources.
 */
size_t dt_pwrmgr_wakeup_src_count(dt_pwrmgr_t dt);
 
/**
 * Get the description of a wakeup source.
 *
 * The wakeup sources are ordered as they appear in the registers.
 *
 * @param dt Instance of pwrmgr.
 * @param idx Index of the wakeup source, between 0 and `dt_pwrmgr_wakeup_src_count(dt)-1`.
 * @return Description of the source.
 */
dt_pwrmgr_wakeup_src_t dt_pwrmgr_wakeup_src(dt_pwrmgr_t dt, size_t idx);
 
/**
 * Description of a reset request source.
 *
 * A reset request source is always identified by the instance ID of the module where it comes
 * from. In principle, some instances could have several reset requests. If this is the case,
 * the `rst_req` can be used to distinguish between those. It should be cast to the
 * `dt_<ip>_reset_req_t` type of the corresponding IP.
 */
typedef struct dt_pwrmgr_reset_req_src {
  dt_instance_id_t inst_id; /**< Instance ID of the source of this reset request. */
  size_t reset_req; /**< Index of the reset request signal for that instance. */
} dt_pwrmgr_reset_req_src_t;
 
 
/**
 * Get the number of peripheral reset requests.
 *
 * @param dt Instance of pwrmgr.
 * @return Number of reset requests.
 */
size_t dt_pwrmgr_reset_request_src_count(dt_pwrmgr_t dt);
 
/**
 * Get the description of a reset request.
 *
 * The reset requests are ordered as they appear in the registers.
 *
 * @param dt Instance of pwrmgr.
 * @param idx Index of the reset request source, between 0 and
 *            `dt_pwrmgr_reset_request_src_count(dt)-1`.
 * @return Description of the reset.
 */
dt_pwrmgr_reset_req_src_t dt_pwrmgr_reset_request_src(dt_pwrmgr_t dt, size_t idx);
 
 
 
#ifdef __cplusplus
}  // extern "C"
#endif  // __cplusplus
 
#endif  // OPENTITAN_DT_PWRMGR_H_