Software APIs
dt_pinmux.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_PINMUX_H_
8#define OPENTITAN_DT_PINMUX_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP pinmux and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the pinmux.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_pinmux {
24 kDtPinmuxAon = 0, /**< pinmux_aon */
25 kDtPinmuxFirst = 0, /**< \internal First instance */
26 kDtPinmuxCount = 1, /**< \internal Number of instances */
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
34typedef enum dt_pinmux_reg_block {
35 kDtPinmuxRegBlockCore = 0, /**< */
36 kDtPinmuxRegBlockCount = 1, /**< \internal Number of register blocks */
38
39/** Primary register block (associated with the "primary" set of registers that control the IP). */
40static const dt_pinmux_reg_block_t kDtPinmuxRegBlockPrimary = kDtPinmuxRegBlockCore;
41
42/**
43 * List of clock ports.
44 *
45 * Clock ports are guaranteed to be numbered consecutively from 0.
46 */
47typedef enum dt_pinmux_clock {
48 kDtPinmuxClockClk = 0, /**< Clock port clk_i */
49 kDtPinmuxClockAon = 1, /**< Clock port clk_aon_i */
50 kDtPinmuxClockCount = 2, /**< \internal Number of clock ports */
52
53/**
54 * List of reset ports.
55 *
56 * Reset ports are guaranteed to be numbered consecutively from 0.
57 */
58typedef enum dt_pinmux_reset {
59 kDtPinmuxResetRst = 0, /**< Reset port rst_ni */
60 kDtPinmuxResetAon = 1, /**< Reset port rst_aon_ni */
61 kDtPinmuxResetSys = 2, /**< Reset port rst_sys_ni */
62 kDtPinmuxResetCount = 3, /**< \internal Number of reset ports */
64
65/**
66 * List of wakeups.
67 *
68 * Wakeups are guaranteed to be numbered consecutively from 0.
69 */
70typedef enum dt_pinmux_wakeup {
71 kDtPinmuxWakeupPinWkupReq = 0, /**< pin wake request */
72 kDtPinmuxWakeupUsbWkupReq = 1, /**< usb wake request */
73 kDtPinmuxWakeupCount = 2, /**< \internal Number of wakeups */
75
76
77/**
78 * Get the pinmux instance from an instance ID
79 *
80 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
81 *
82 * @param inst_id Instance ID.
83 * @return A pinmux instance.
84 *
85 * **Note:** This function only makes sense if the instance ID has device type pinmux,
86 * otherwise the returned value is unspecified.
87 */
89
90/**
91 * Get the instance ID of an instance.
92 *
93 * @param dt Instance of pinmux.
94 * @return The instance ID of that instance.
95 */
97
98/**
99 * Get the register base address of an instance.
100 *
101 * @param dt Instance of pinmux.
102 * @param reg_block The register block requested.
103 * @return The register base address of the requested block.
104 */
105uint32_t dt_pinmux_reg_block(
106 dt_pinmux_t dt,
107 dt_pinmux_reg_block_t reg_block);
108
109/**
110 * Get the primary register base address of an instance.
111 *
112 * This is just a convenience function, equivalent to
113 * `dt_pinmux_reg_block(dt, kDtPinmuxRegBlockCore)`
114 *
115 * @param dt Instance of pinmux.
116 * @return The register base address of the primary register block.
117 */
118static inline uint32_t dt_pinmux_primary_reg_block(
119 dt_pinmux_t dt) {
120 return dt_pinmux_reg_block(dt, kDtPinmuxRegBlockCore);
121}
122
123
124
125
126/**
127 * Get the clock signal connected to a clock port of an instance.
128 *
129 * @param dt Instance of pinmux.
130 * @param clk Clock port.
131 * @return Clock signal.
132 */
134 dt_pinmux_t dt,
136
137/**
138 * Get the reset signal connected to a reset port of an instance.
139 *
140 * @param dt Instance of pinmux.
141 * @param rst Reset port.
142 * @return Reset signal.
143 */
145 dt_pinmux_t dt,
147
148
149
150#endif // OPENTITAN_DT_PINMUX_H_