Software APIs
dt_gpio.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_GPIO_H_
8#define OPENTITAN_DT_GPIO_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP gpio and top englishbreakfast.
17 *
18 * This file contains the type definitions and global functions of the gpio.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26
27
28/**
29 * List of instances.
30 */
31typedef enum dt_gpio {
32 kDtGpio = 0, /**< gpio */
33 kDtGpioFirst = 0, /**< \internal First instance */
34 kDtGpioCount = 1, /**< \internal Number of instances */
35} dt_gpio_t;
36
37/**
38 * List of register blocks.
39 *
40 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
41 */
42typedef enum dt_gpio_reg_block {
43 kDtGpioRegBlockCore = 0, /**< */
44 kDtGpioRegBlockCount = 1, /**< \internal Number of register blocks */
45} dt_gpio_reg_block_t;
46
47/** Primary register block (associated with the "primary" set of registers that control the IP). */
48static const dt_gpio_reg_block_t kDtGpioRegBlockPrimary = kDtGpioRegBlockCore;
49
50/**
51 * List of IRQs.
52 *
53 * IRQs are guaranteed to be numbered consecutively from 0.
54 */
55typedef enum dt_gpio_irq {
56 kDtGpioIrqGpio0 = 0, /**< raised if any of GPIO pin detects configured interrupt mode */
57 kDtGpioIrqGpio1 = 1, /**< raised if any of GPIO pin detects configured interrupt mode */
58 kDtGpioIrqGpio2 = 2, /**< raised if any of GPIO pin detects configured interrupt mode */
59 kDtGpioIrqGpio3 = 3, /**< raised if any of GPIO pin detects configured interrupt mode */
60 kDtGpioIrqGpio4 = 4, /**< raised if any of GPIO pin detects configured interrupt mode */
61 kDtGpioIrqGpio5 = 5, /**< raised if any of GPIO pin detects configured interrupt mode */
62 kDtGpioIrqGpio6 = 6, /**< raised if any of GPIO pin detects configured interrupt mode */
63 kDtGpioIrqGpio7 = 7, /**< raised if any of GPIO pin detects configured interrupt mode */
64 kDtGpioIrqGpio8 = 8, /**< raised if any of GPIO pin detects configured interrupt mode */
65 kDtGpioIrqGpio9 = 9, /**< raised if any of GPIO pin detects configured interrupt mode */
66 kDtGpioIrqGpio10 = 10, /**< raised if any of GPIO pin detects configured interrupt mode */
67 kDtGpioIrqGpio11 = 11, /**< raised if any of GPIO pin detects configured interrupt mode */
68 kDtGpioIrqGpio12 = 12, /**< raised if any of GPIO pin detects configured interrupt mode */
69 kDtGpioIrqGpio13 = 13, /**< raised if any of GPIO pin detects configured interrupt mode */
70 kDtGpioIrqGpio14 = 14, /**< raised if any of GPIO pin detects configured interrupt mode */
71 kDtGpioIrqGpio15 = 15, /**< raised if any of GPIO pin detects configured interrupt mode */
72 kDtGpioIrqGpio16 = 16, /**< raised if any of GPIO pin detects configured interrupt mode */
73 kDtGpioIrqGpio17 = 17, /**< raised if any of GPIO pin detects configured interrupt mode */
74 kDtGpioIrqGpio18 = 18, /**< raised if any of GPIO pin detects configured interrupt mode */
75 kDtGpioIrqGpio19 = 19, /**< raised if any of GPIO pin detects configured interrupt mode */
76 kDtGpioIrqGpio20 = 20, /**< raised if any of GPIO pin detects configured interrupt mode */
77 kDtGpioIrqGpio21 = 21, /**< raised if any of GPIO pin detects configured interrupt mode */
78 kDtGpioIrqGpio22 = 22, /**< raised if any of GPIO pin detects configured interrupt mode */
79 kDtGpioIrqGpio23 = 23, /**< raised if any of GPIO pin detects configured interrupt mode */
80 kDtGpioIrqGpio24 = 24, /**< raised if any of GPIO pin detects configured interrupt mode */
81 kDtGpioIrqGpio25 = 25, /**< raised if any of GPIO pin detects configured interrupt mode */
82 kDtGpioIrqGpio26 = 26, /**< raised if any of GPIO pin detects configured interrupt mode */
83 kDtGpioIrqGpio27 = 27, /**< raised if any of GPIO pin detects configured interrupt mode */
84 kDtGpioIrqGpio28 = 28, /**< raised if any of GPIO pin detects configured interrupt mode */
85 kDtGpioIrqGpio29 = 29, /**< raised if any of GPIO pin detects configured interrupt mode */
86 kDtGpioIrqGpio30 = 30, /**< raised if any of GPIO pin detects configured interrupt mode */
87 kDtGpioIrqGpio31 = 31, /**< raised if any of GPIO pin detects configured interrupt mode */
88 kDtGpioIrqCount = 32, /**< \internal Number of IRQs */
89} dt_gpio_irq_t;
90
91/**
92 * List of clock ports.
93 *
94 * Clock ports are guaranteed to be numbered consecutively from 0.
95 */
96typedef enum dt_gpio_clock {
97 kDtGpioClockClk = 0, /**< Clock port clk_i */
98 kDtGpioClockCount = 1, /**< \internal Number of clock ports */
99} dt_gpio_clock_t;
100
101/**
102 * List of reset ports.
103 *
104 * Reset ports are guaranteed to be numbered consecutively from 0.
105 */
106typedef enum dt_gpio_reset {
107 kDtGpioResetRst = 0, /**< Reset port rst_ni */
108 kDtGpioResetCount = 1, /**< \internal Number of reset ports */
109} dt_gpio_reset_t;
110
111/**
112 * List of peripheral I/O.
113 *
114 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
115 */
116typedef enum dt_gpio_periph_io {
117 kDtGpioPeriphIoGpio0 = 0, /**< */
118 kDtGpioPeriphIoGpio1 = 1, /**< */
119 kDtGpioPeriphIoGpio2 = 2, /**< */
120 kDtGpioPeriphIoGpio3 = 3, /**< */
121 kDtGpioPeriphIoGpio4 = 4, /**< */
122 kDtGpioPeriphIoGpio5 = 5, /**< */
123 kDtGpioPeriphIoGpio6 = 6, /**< */
124 kDtGpioPeriphIoGpio7 = 7, /**< */
125 kDtGpioPeriphIoGpio8 = 8, /**< */
126 kDtGpioPeriphIoGpio9 = 9, /**< */
127 kDtGpioPeriphIoGpio10 = 10, /**< */
128 kDtGpioPeriphIoGpio11 = 11, /**< */
129 kDtGpioPeriphIoGpio12 = 12, /**< */
130 kDtGpioPeriphIoGpio13 = 13, /**< */
131 kDtGpioPeriphIoGpio14 = 14, /**< */
132 kDtGpioPeriphIoGpio15 = 15, /**< */
133 kDtGpioPeriphIoGpio16 = 16, /**< */
134 kDtGpioPeriphIoGpio17 = 17, /**< */
135 kDtGpioPeriphIoGpio18 = 18, /**< */
136 kDtGpioPeriphIoGpio19 = 19, /**< */
137 kDtGpioPeriphIoGpio20 = 20, /**< */
138 kDtGpioPeriphIoGpio21 = 21, /**< */
139 kDtGpioPeriphIoGpio22 = 22, /**< */
140 kDtGpioPeriphIoGpio23 = 23, /**< */
141 kDtGpioPeriphIoGpio24 = 24, /**< */
142 kDtGpioPeriphIoGpio25 = 25, /**< */
143 kDtGpioPeriphIoGpio26 = 26, /**< */
144 kDtGpioPeriphIoGpio27 = 27, /**< */
145 kDtGpioPeriphIoGpio28 = 28, /**< */
146 kDtGpioPeriphIoGpio29 = 29, /**< */
147 kDtGpioPeriphIoGpio30 = 30, /**< */
148 kDtGpioPeriphIoGpio31 = 31, /**< */
149 kDtGpioPeriphIoCount = 32, /**< \internal Number of peripheral I/O */
150} dt_gpio_periph_io_t;
151
152/**
153 * List of supported hardware features.
154 */
155#define OPENTITAN_GPIO_HAS_IN_INTR_CTRL 1
156#define OPENTITAN_GPIO_HAS_IN_FILTER 1
157#define OPENTITAN_GPIO_HAS_OUT_MASK 1
158
159
160
161/**
162 * Get the gpio instance from an instance ID
163 *
164 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
165 *
166 * @param inst_id Instance ID.
167 * @return A gpio instance.
168 *
169 * **Note:** This function only makes sense if the instance ID has device type gpio,
170 * otherwise the returned value is unspecified.
171 */
172dt_gpio_t dt_gpio_from_instance_id(dt_instance_id_t inst_id);
173
174/**
175 * Get the instance ID of an instance.
176 *
177 * @param dt Instance of gpio.
178 * @return The instance ID of that instance.
179 */
180dt_instance_id_t dt_gpio_instance_id(dt_gpio_t dt);
181
182/**
183 * Get the register base address of an instance.
184 *
185 * @param dt Instance of gpio.
186 * @param reg_block The register block requested.
187 * @return The register base address of the requested block.
188 */
189uint32_t dt_gpio_reg_block(
190 dt_gpio_t dt,
191 dt_gpio_reg_block_t reg_block);
192
193/**
194 * Get the primary register base address of an instance.
195 *
196 * This is just a convenience function, equivalent to
197 * `dt_gpio_reg_block(dt, kDtGpioRegBlockCore)`
198 *
199 * @param dt Instance of gpio.
200 * @return The register base address of the primary register block.
201 */
202static inline uint32_t dt_gpio_primary_reg_block(
203 dt_gpio_t dt) {
204 return dt_gpio_reg_block(dt, kDtGpioRegBlockCore);
205}
206
207/**
208 * Get the PLIC ID of a gpio IRQ for a given instance.
209 *
210 * If the instance is not connected to the PLIC, this function
211 * will return `kDtPlicIrqIdNone`.
212 *
213 * @param dt Instance of gpio.
214 * @param irq A gpio IRQ.
215 * @return The PLIC ID of the IRQ of this instance.
216 */
217dt_plic_irq_id_t dt_gpio_irq_to_plic_id(
218 dt_gpio_t dt,
219 dt_gpio_irq_t irq);
220
221/**
222 * Convert a global IRQ ID to a local gpio IRQ type.
223 *
224 * @param dt Instance of gpio.
225 * @param irq A PLIC ID that belongs to this instance.
226 * @return The gpio IRQ, or `kDtGpioIrqCount`.
227 *
228 * **Note:** This function assumes that the PLIC ID belongs to the instance
229 * of gpio passed in parameter. In other words, it must be the case that
230 * `dt_gpio_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
231 * will return `kDtGpioIrqCount`.
232 */
233dt_gpio_irq_t dt_gpio_irq_from_plic_id(
234 dt_gpio_t dt,
235 dt_plic_irq_id_t irq);
236
237
238
239/**
240 * Get the peripheral I/O description of an instance.
241 *
242 * @param dt Instance of gpio.
243 * @param sig Requested peripheral I/O.
244 * @return Description of the requested peripheral I/O for this instance.
245 */
246dt_periph_io_t dt_gpio_periph_io(
247 dt_gpio_t dt,
248 dt_gpio_periph_io_t sig);
249
250/**
251 * Get the clock signal connected to a clock port of an instance.
252 *
253 * @param dt Instance of gpio.
254 * @param clk Clock port.
255 * @return Clock signal.
256 */
257dt_clock_t dt_gpio_clock(
258 dt_gpio_t dt,
259 dt_gpio_clock_t clk);
260
261/**
262 * Get the reset signal connected to a reset port of an instance.
263 *
264 * @param dt Instance of gpio.
265 * @param rst Reset port.
266 * @return Reset signal.
267 */
268dt_reset_t dt_gpio_reset(
269 dt_gpio_t dt,
270 dt_gpio_reset_t rst);
271
272
273
274/**
275 * Get the number of input period counters.
276 *
277 * @param dt Instance of gpio.
278 * @return number of input period counters.
279 */
280uint8_t dt_gpio_input_period_counter_count(dt_gpio_t dt);
281
282
283
284#ifdef __cplusplus
285} // extern "C"
286#endif // __cplusplus
287
288#endif // OPENTITAN_DT_GPIO_H_