Software APIs
dt_flash_ctrl.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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#ifndef OPENTITAN_DT_FLASH_CTRL_H_
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#define OPENTITAN_DT_FLASH_CTRL_H_
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/**
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* @file
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* @brief Device Tables (DT) for IP flash_ctrl and top englishbreakfast.
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*
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* This file contains the type definitions and global functions of the flash_ctrl.
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*/
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#include "
dt_api.h
"
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#include <stdint.h>
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/**
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* List of instances.
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*/
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typedef
enum
dt_flash_ctrl
{
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kDtFlashCtrl
= 0,
/**< flash_ctrl */
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kDtFlashCtrlFirst = 0,
/**< \internal First instance */
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kDtFlashCtrlCount = 1,
/**< \internal Number of instances */
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}
dt_flash_ctrl_t
;
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/**
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* List of register blocks.
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*
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* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_flash_ctrl_reg_block
{
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kDtFlashCtrlRegBlockCore = 0,
/**< */
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kDtFlashCtrlRegBlockPrim = 1,
/**< */
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kDtFlashCtrlRegBlockMem = 2,
/**< */
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kDtFlashCtrlRegBlockCount = 3,
/**< \internal Number of register blocks */
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}
dt_flash_ctrl_reg_block_t
;
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/** Primary register block (associated with the "primary" set of registers that control the IP). */
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static
const
dt_flash_ctrl_reg_block_t
kDtFlashCtrlRegBlockPrimary = kDtFlashCtrlRegBlockCore;
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/**
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* List of IRQs.
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*
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* IRQs are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_flash_ctrl_irq
{
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kDtFlashCtrlIrqProgEmpty
= 0,
/**< Program FIFO empty */
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kDtFlashCtrlIrqProgLvl
= 1,
/**< Program FIFO drained to level */
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kDtFlashCtrlIrqRdFull
= 2,
/**< Read FIFO full */
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kDtFlashCtrlIrqRdLvl
= 3,
/**< Read FIFO filled to level */
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kDtFlashCtrlIrqOpDone
= 4,
/**< Operation complete */
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kDtFlashCtrlIrqCorrErr
= 5,
/**< Correctable error encountered */
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kDtFlashCtrlIrqCount = 6,
/**< \internal Number of IRQs */
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}
dt_flash_ctrl_irq_t
;
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/**
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* List of clock ports.
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*
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* Clock ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_flash_ctrl_clock
{
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kDtFlashCtrlClockClk
= 0,
/**< Clock port clk_i */
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kDtFlashCtrlClockOtp
= 1,
/**< Clock port clk_otp_i */
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kDtFlashCtrlClockCount = 2,
/**< \internal Number of clock ports */
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}
dt_flash_ctrl_clock_t
;
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/**
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* List of reset ports.
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*
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* Reset ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_flash_ctrl_reset
{
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kDtFlashCtrlResetRst
= 0,
/**< Reset port rst_ni */
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kDtFlashCtrlResetOtp
= 1,
/**< Reset port rst_otp_ni */
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kDtFlashCtrlResetCount = 2,
/**< \internal Number of reset ports */
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}
dt_flash_ctrl_reset_t
;
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/**
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* List of peripheral I/O.
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*
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* Peripheral I/O are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_flash_ctrl_periph_io
{
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kDtFlashCtrlPeriphIoTck = 0,
/**< */
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kDtFlashCtrlPeriphIoTms = 1,
/**< */
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kDtFlashCtrlPeriphIoTdi = 2,
/**< */
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kDtFlashCtrlPeriphIoTdo = 3,
/**< */
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kDtFlashCtrlPeriphIoCount = 4,
/**< \internal Number of peripheral I/O */
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}
dt_flash_ctrl_periph_io_t
;
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/**
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* List of supported hardware features.
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*/
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#define OPENTITAN_FLASH_CTRL_HAS_ESCALATION 1
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#define OPENTITAN_FLASH_CTRL_HAS_FETCH_CODE 1
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#define OPENTITAN_FLASH_CTRL_HAS_INFO_CREATOR_PARTITION 1
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#define OPENTITAN_FLASH_CTRL_HAS_INFO_ISOLATED_PARTITION 1
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#define OPENTITAN_FLASH_CTRL_HAS_INFO_OWNER_PARTITION 1
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#define OPENTITAN_FLASH_CTRL_HAS_INIT_ROOT_SEEDS 1
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#define OPENTITAN_FLASH_CTRL_HAS_INIT_SCRAMBLING_KEYS 1
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#define OPENTITAN_FLASH_CTRL_HAS_MEM_PROTECTION 1
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#define OPENTITAN_FLASH_CTRL_HAS_OP_HOST_READ 1
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#define OPENTITAN_FLASH_CTRL_HAS_OP_PROTOCOL_CTRL 1
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#define OPENTITAN_FLASH_CTRL_HAS_RMA 1
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/**
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* Get the flash_ctrl instance from an instance ID
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*
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* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
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*
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* @param inst_id Instance ID.
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* @return A flash_ctrl instance.
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*
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* **Note:** This function only makes sense if the instance ID has device type flash_ctrl,
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* otherwise the returned value is unspecified.
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*/
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dt_flash_ctrl_t
dt_flash_ctrl_from_instance_id
(
dt_instance_id_t
inst_id);
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/**
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* Get the instance ID of an instance.
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*
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* @param dt Instance of flash_ctrl.
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* @return The instance ID of that instance.
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*/
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dt_instance_id_t
dt_flash_ctrl_instance_id
(
dt_flash_ctrl_t
dt);
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/**
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* Get the register base address of an instance.
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*
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* @param dt Instance of flash_ctrl.
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* @param reg_block The register block requested.
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* @return The register base address of the requested block.
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*/
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uint32_t
dt_flash_ctrl_reg_block
(
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dt_flash_ctrl_t
dt,
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dt_flash_ctrl_reg_block_t
reg_block);
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/**
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* Get the primary register base address of an instance.
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*
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* This is just a convenience function, equivalent to
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* `dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore)`
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*
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* @param dt Instance of flash_ctrl.
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* @return The register base address of the primary register block.
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*/
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static
inline
uint32_t dt_flash_ctrl_primary_reg_block(
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dt_flash_ctrl_t
dt) {
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return
dt_flash_ctrl_reg_block
(dt, kDtFlashCtrlRegBlockCore);
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}
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/**
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* Get the PLIC ID of a flash_ctrl IRQ for a given instance.
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*
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* If the instance is not connected to the PLIC, this function
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* will return `kDtPlicIrqIdNone`.
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*
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* @param dt Instance of flash_ctrl.
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* @param irq A flash_ctrl IRQ.
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* @return The PLIC ID of the IRQ of this instance.
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*/
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dt_plic_irq_id_t
dt_flash_ctrl_irq_to_plic_id
(
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dt_flash_ctrl_t
dt,
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dt_flash_ctrl_irq_t
irq);
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/**
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* Convert a global IRQ ID to a local flash_ctrl IRQ type.
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*
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* @param dt Instance of flash_ctrl.
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* @param irq A PLIC ID that belongs to this instance.
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* @return The flash_ctrl IRQ, or `kDtFlashCtrlIrqCount`.
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*
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* **Note:** This function assumes that the PLIC ID belongs to the instance
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* of flash_ctrl passed in parameter. In other words, it must be the case that
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* `dt_flash_ctrl_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
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* will return `kDtFlashCtrlIrqCount`.
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*/
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dt_flash_ctrl_irq_t
dt_flash_ctrl_irq_from_plic_id
(
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dt_flash_ctrl_t
dt,
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dt_plic_irq_id_t
irq);
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/**
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* Get the peripheral I/O description of an instance.
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*
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* @param dt Instance of flash_ctrl.
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* @param sig Requested peripheral I/O.
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* @return Description of the requested peripheral I/O for this instance.
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*/
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dt_periph_io_t
dt_flash_ctrl_periph_io
(
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dt_flash_ctrl_t
dt,
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dt_flash_ctrl_periph_io_t
sig);
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/**
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* Get the clock signal connected to a clock port of an instance.
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*
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* @param dt Instance of flash_ctrl.
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* @param clk Clock port.
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* @return Clock signal.
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*/
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dt_clock_t
dt_flash_ctrl_clock
(
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dt_flash_ctrl_t
dt,
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dt_flash_ctrl_clock_t
clk);
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/**
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* Get the reset signal connected to a reset port of an instance.
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*
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* @param dt Instance of flash_ctrl.
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* @param rst Reset port.
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* @return Reset signal.
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*/
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dt_reset_t
dt_flash_ctrl_reset
(
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dt_flash_ctrl_t
dt,
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dt_flash_ctrl_reset_t
rst);
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#endif
// OPENTITAN_DT_FLASH_CTRL_H_
(englishbreakfast)
hw
top
dt
dt_flash_ctrl.h
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