Software APIs
dt_aon_timer.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_AON_TIMER_H_
8#define OPENTITAN_DT_AON_TIMER_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP aon_timer and top englishbreakfast.
17 *
18 * This file contains the type definitions and global functions of the aon_timer.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_aon_timer {
30 kDtAonTimerAon = 0, /**< aon_timer_aon */
31 kDtAonTimerFirst = 0, /**< \internal First instance */
32 kDtAonTimerCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
41 kDtAonTimerRegBlockCore = 0, /**< */
42 kDtAonTimerRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/** Primary register block (associated with the "primary" set of registers that control the IP). */
46static const dt_aon_timer_reg_block_t kDtAonTimerRegBlockPrimary = kDtAonTimerRegBlockCore;
47
48/**
49 * List of IRQs.
50 *
51 * IRQs are guaranteed to be numbered consecutively from 0.
52 */
53typedef enum dt_aon_timer_irq {
54 kDtAonTimerIrqWkupTimerExpired = 0, /**< Raised if the wakeup timer has hit the specified threshold. */
55 kDtAonTimerIrqWdogTimerBark = 1, /**< Raised if the watchdog timer has hit the bark threshold. */
56 kDtAonTimerIrqCount = 2, /**< \internal Number of IRQs */
58
59/**
60 * List of clock ports.
61 *
62 * Clock ports are guaranteed to be numbered consecutively from 0.
63 */
64typedef enum dt_aon_timer_clock {
65 kDtAonTimerClockClk = 0, /**< Clock port clk_i */
66 kDtAonTimerClockAon = 1, /**< Clock port clk_aon_i */
67 kDtAonTimerClockCount = 2, /**< \internal Number of clock ports */
69
70/**
71 * List of reset requests.
72 *
73 * Reset requests are guaranteed to be numbered consecutively from 0.
74 */
76 kDtAonTimerResetReqAonTimer = 0, /**< Watchdog reset request. */
77 kDtAonTimerResetReqCount = 1, /**< \internal Number of reset requests */
79
80/**
81 * List of reset ports.
82 *
83 * Reset ports are guaranteed to be numbered consecutively from 0.
84 */
85typedef enum dt_aon_timer_reset {
86 kDtAonTimerResetRst = 0, /**< Reset port rst_ni */
87 kDtAonTimerResetAon = 1, /**< Reset port rst_aon_ni */
88 kDtAonTimerResetCount = 2, /**< \internal Number of reset ports */
90
91/**
92 * List of wakeups.
93 *
94 * Wakeups are guaranteed to be numbered consecutively from 0.
95 */
96typedef enum dt_aon_timer_wakeup {
97 kDtAonTimerWakeupWkupReq = 0, /**< Raised if the wakeup or watchdog timer has hit the specified threshold. */
98 kDtAonTimerWakeupCount = 1, /**< \internal Number of wakeups */
100
101/**
102 * List of supported hardware features.
103 */
104#define OPENTITAN_AON_TIMER_HAS_WAKEUP_WAKEUP_CONFIG 1
105#define OPENTITAN_AON_TIMER_HAS_WAKEUP_WAKEUP_REQUEST 1
106#define OPENTITAN_AON_TIMER_HAS_WAKEUP_INTERRUPT 1
107#define OPENTITAN_AON_TIMER_HAS_WATCHDOG_BARK 1
108#define OPENTITAN_AON_TIMER_HAS_WATCHDOG_BITE 1
109#define OPENTITAN_AON_TIMER_HAS_WATCHDOG_PAUSE 1
110#define OPENTITAN_AON_TIMER_HAS_WATCHDOG_DISABLE_BY_LC_CTRL 1
111#define OPENTITAN_AON_TIMER_HAS_WATCHDOG_INTERRUPT 1
112
113
114
115/**
116 * Get the aon_timer instance from an instance ID
117 *
118 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
119 *
120 * @param inst_id Instance ID.
121 * @return A aon_timer instance.
122 *
123 * **Note:** This function only makes sense if the instance ID has device type aon_timer,
124 * otherwise the returned value is unspecified.
125 */
127
128/**
129 * Get the instance ID of an instance.
130 *
131 * @param dt Instance of aon_timer.
132 * @return The instance ID of that instance.
133 */
135
136/**
137 * Get the register base address of an instance.
138 *
139 * @param dt Instance of aon_timer.
140 * @param reg_block The register block requested.
141 * @return The register base address of the requested block.
142 */
145 dt_aon_timer_reg_block_t reg_block);
146
147/**
148 * Get the primary register base address of an instance.
149 *
150 * This is just a convenience function, equivalent to
151 * `dt_aon_timer_reg_block(dt, kDtAonTimerRegBlockCore)`
152 *
153 * @param dt Instance of aon_timer.
154 * @return The register base address of the primary register block.
155 */
156static inline uint32_t dt_aon_timer_primary_reg_block(
157 dt_aon_timer_t dt) {
158 return dt_aon_timer_reg_block(dt, kDtAonTimerRegBlockCore);
159}
160
161/**
162 * Get the PLIC ID of a aon_timer IRQ for a given instance.
163 *
164 * If the instance is not connected to the PLIC, this function
165 * will return `kDtPlicIrqIdNone`.
166 *
167 * @param dt Instance of aon_timer.
168 * @param irq A aon_timer IRQ.
169 * @return The PLIC ID of the IRQ of this instance.
170 */
174
175/**
176 * Convert a global IRQ ID to a local aon_timer IRQ type.
177 *
178 * @param dt Instance of aon_timer.
179 * @param irq A PLIC ID that belongs to this instance.
180 * @return The aon_timer IRQ, or `kDtAonTimerIrqCount`.
181 *
182 * **Note:** This function assumes that the PLIC ID belongs to the instance
183 * of aon_timer passed in parameter. In other words, it must be the case that
184 * `dt_aon_timer_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
185 * will return `kDtAonTimerIrqCount`.
186 */
189 dt_plic_irq_id_t irq);
190
191
192
193
194/**
195 * Get the clock signal connected to a clock port of an instance.
196 *
197 * @param dt Instance of aon_timer.
198 * @param clk Clock port.
199 * @return Clock signal.
200 */
204
205/**
206 * Get the reset signal connected to a reset port of an instance.
207 *
208 * @param dt Instance of aon_timer.
209 * @param rst Reset port.
210 * @return Reset signal.
211 */
215
216
217
218#ifdef __cplusplus
219} // extern "C"
220#endif // __cplusplus
221
222#endif // OPENTITAN_DT_AON_TIMER_H_