Software APIs
dt_aes.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_AES_H_
8#define OPENTITAN_DT_AES_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP aes and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the aes.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_aes {
24 kDtAes = 0, /**< aes */
25 kDtAesFirst = 0, /**< \internal First instance */
26 kDtAesCount = 1, /**< \internal Number of instances */
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
34typedef enum dt_aes_reg_block {
35 kDtAesRegBlockCore = 0, /**< */
36 kDtAesRegBlockCount = 1, /**< \internal Number of register blocks */
38
39/** Primary register block (associated with the "primary" set of registers that control the IP). */
40static const dt_aes_reg_block_t kDtAesRegBlockPrimary = kDtAesRegBlockCore;
41
42/**
43 * List of clock ports.
44 *
45 * Clock ports are guaranteed to be numbered consecutively from 0.
46 */
47typedef enum dt_aes_clock {
48 kDtAesClockClk = 0, /**< Clock port clk_i */
49 kDtAesClockEdn = 1, /**< Clock port clk_edn_i */
50 kDtAesClockCount = 2, /**< \internal Number of clock ports */
52
53/**
54 * List of reset ports.
55 *
56 * Reset ports are guaranteed to be numbered consecutively from 0.
57 */
58typedef enum dt_aes_reset {
59 kDtAesResetRst = 0, /**< Reset port rst_ni */
60 kDtAesResetEdn = 1, /**< Reset port rst_edn_ni */
61 kDtAesResetCount = 2, /**< \internal Number of reset ports */
63
64/**
65 * List of supported hardware features.
66 */
67#define OPENTITAN_AES_HAS_KEY_LEN_128 1
68#define OPENTITAN_AES_HAS_KEY_LEN_192 1
69#define OPENTITAN_AES_HAS_KEY_LEN_256 1
70#define OPENTITAN_AES_HAS_MODE_ECB 1
71#define OPENTITAN_AES_HAS_MODE_CBC 1
72#define OPENTITAN_AES_HAS_MODE_CFB_128 1
73#define OPENTITAN_AES_HAS_MODE_OFB 1
74#define OPENTITAN_AES_HAS_MODE_CTR 1
75#define OPENTITAN_AES_HAS_KEY_SIDELOAD 1
76#define OPENTITAN_AES_HAS_CLEAR_DATA_OUT 1
77#define OPENTITAN_AES_HAS_CLEAR_KEY_IV_DATA_IN 1
78#define OPENTITAN_AES_HAS_PRNG_RESEED_RATE 1
79#define OPENTITAN_AES_HAS_PRNG_KEY_TOUCH_FORCES_RESEED 1
80#define OPENTITAN_AES_HAS_PRNG_FORCE_MASKS 1
81#define OPENTITAN_AES_HAS_MANUAL_OPERATION 1
82
83
84
85/**
86 * Get the aes instance from an instance ID
87 *
88 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
89 *
90 * @param inst_id Instance ID.
91 * @return A aes instance.
92 *
93 * **Note:** This function only makes sense if the instance ID has device type aes,
94 * otherwise the returned value is unspecified.
95 */
97
98/**
99 * Get the instance ID of an instance.
100 *
101 * @param dt Instance of aes.
102 * @return The instance ID of that instance.
103 */
105
106/**
107 * Get the register base address of an instance.
108 *
109 * @param dt Instance of aes.
110 * @param reg_block The register block requested.
111 * @return The register base address of the requested block.
112 */
113uint32_t dt_aes_reg_block(
114 dt_aes_t dt,
115 dt_aes_reg_block_t reg_block);
116
117/**
118 * Get the primary register base address of an instance.
119 *
120 * This is just a convenience function, equivalent to
121 * `dt_aes_reg_block(dt, kDtAesRegBlockCore)`
122 *
123 * @param dt Instance of aes.
124 * @return The register base address of the primary register block.
125 */
126static inline uint32_t dt_aes_primary_reg_block(
127 dt_aes_t dt) {
128 return dt_aes_reg_block(dt, kDtAesRegBlockCore);
129}
130
131
132
133
134/**
135 * Get the clock signal connected to a clock port of an instance.
136 *
137 * @param dt Instance of aes.
138 * @param clk Clock port.
139 * @return Clock signal.
140 */
142 dt_aes_t dt,
143 dt_aes_clock_t clk);
144
145/**
146 * Get the reset signal connected to a reset port of an instance.
147 *
148 * @param dt Instance of aes.
149 * @param rst Reset port.
150 * @return Reset signal.
151 */
153 dt_aes_t dt,
154 dt_aes_reset_t rst);
155
156
157
158#endif // OPENTITAN_DT_AES_H_