Software APIs
dt_aes.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_AES_H_
8#define OPENTITAN_DT_AES_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP aes and top englishbreakfast.
13 *
14 * This file contains the type definitions and global functions of the aes.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_aes {
26 kDtAes = 0, /**< aes */
27 kDtAesFirst = 0, /**< \internal First instance */
28 kDtAesCount = 1, /**< \internal Number of instances */
30
31/**
32 * List of register blocks.
33 *
34 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
35 */
36typedef enum dt_aes_reg_block {
37 kDtAesRegBlockCore = 0, /**< */
38 kDtAesRegBlockCount = 1, /**< \internal Number of register blocks */
40
41/** Primary register block (associated with the "primary" set of registers that control the IP). */
42static const dt_aes_reg_block_t kDtAesRegBlockPrimary = kDtAesRegBlockCore;
43
44/**
45 * List of clock ports.
46 *
47 * Clock ports are guaranteed to be numbered consecutively from 0.
48 */
49typedef enum dt_aes_clock {
50 kDtAesClockClk = 0, /**< Clock port clk_i */
51 kDtAesClockEdn = 1, /**< Clock port clk_edn_i */
52 kDtAesClockCount = 2, /**< \internal Number of clock ports */
54
55/**
56 * List of reset ports.
57 *
58 * Reset ports are guaranteed to be numbered consecutively from 0.
59 */
60typedef enum dt_aes_reset {
61 kDtAesResetRst = 0, /**< Reset port rst_ni */
62 kDtAesResetEdn = 1, /**< Reset port rst_edn_ni */
63 kDtAesResetCount = 2, /**< \internal Number of reset ports */
65
66/**
67 * List of supported hardware features.
68 */
69#define OPENTITAN_AES_HAS_KEY_LEN_128 1
70#define OPENTITAN_AES_HAS_KEY_LEN_192 1
71#define OPENTITAN_AES_HAS_KEY_LEN_256 1
72#define OPENTITAN_AES_HAS_MODE_ECB 1
73#define OPENTITAN_AES_HAS_MODE_CBC 1
74#define OPENTITAN_AES_HAS_MODE_CFB_128 1
75#define OPENTITAN_AES_HAS_MODE_OFB 1
76#define OPENTITAN_AES_HAS_MODE_CTR 1
77#define OPENTITAN_AES_HAS_KEY_SIDELOAD 1
78#define OPENTITAN_AES_HAS_CLEAR_DATA_OUT 1
79#define OPENTITAN_AES_HAS_CLEAR_KEY_IV_DATA_IN 1
80#define OPENTITAN_AES_HAS_PRNG_RESEED_RATE 1
81#define OPENTITAN_AES_HAS_PRNG_KEY_TOUCH_FORCES_RESEED 1
82#define OPENTITAN_AES_HAS_PRNG_FORCE_MASKS 1
83#define OPENTITAN_AES_HAS_MANUAL_OPERATION 1
84
85
86
87/**
88 * Get the aes instance from an instance ID
89 *
90 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
91 *
92 * @param inst_id Instance ID.
93 * @return A aes instance.
94 *
95 * **Note:** This function only makes sense if the instance ID has device type aes,
96 * otherwise the returned value is unspecified.
97 */
99
100/**
101 * Get the instance ID of an instance.
102 *
103 * @param dt Instance of aes.
104 * @return The instance ID of that instance.
105 */
107
108/**
109 * Get the register base address of an instance.
110 *
111 * @param dt Instance of aes.
112 * @param reg_block The register block requested.
113 * @return The register base address of the requested block.
114 */
115uint32_t dt_aes_reg_block(
116 dt_aes_t dt,
117 dt_aes_reg_block_t reg_block);
118
119/**
120 * Get the primary register base address of an instance.
121 *
122 * This is just a convenience function, equivalent to
123 * `dt_aes_reg_block(dt, kDtAesRegBlockCore)`
124 *
125 * @param dt Instance of aes.
126 * @return The register base address of the primary register block.
127 */
128static inline uint32_t dt_aes_primary_reg_block(
129 dt_aes_t dt) {
130 return dt_aes_reg_block(dt, kDtAesRegBlockCore);
131}
132
133
134
135
136/**
137 * Get the clock signal connected to a clock port of an instance.
138 *
139 * @param dt Instance of aes.
140 * @param clk Clock port.
141 * @return Clock signal.
142 */
144 dt_aes_t dt,
145 dt_aes_clock_t clk);
146
147/**
148 * Get the reset signal connected to a reset port of an instance.
149 *
150 * @param dt Instance of aes.
151 * @param rst Reset port.
152 * @return Reset signal.
153 */
155 dt_aes_t dt,
156 dt_aes_reset_t rst);
157
158
159
160#endif // OPENTITAN_DT_AES_H_