155 dif_alert_handler_irq_t irq,
158 if (alert_handler == NULL || is_pending == NULL) {
163 if (!alert_handler_get_irq_bit_index(irq, &index)) {
167 uint32_t intr_state_reg = mmio_region_read32(
169 (ptrdiff_t)ALERT_HANDLER_INTR_STATE_REG_OFFSET);
172 *is_pending = bitfield_bit32_read(intr_state_reg, index);
199 dif_alert_handler_irq_t irq) {
201 if (alert_handler == NULL) {
206 if (!alert_handler_get_irq_bit_index(irq, &index)) {
211 uint32_t intr_state_reg = bitfield_bit32_write(0, index,
true);
214 (ptrdiff_t)ALERT_HANDLER_INTR_STATE_REG_OFFSET,
224 dif_alert_handler_irq_t irq,
227 if (alert_handler == NULL) {
232 if (!alert_handler_get_irq_bit_index(irq, &index)) {
236 uint32_t intr_test_reg = bitfield_bit32_write(0, index, val);
239 (ptrdiff_t)ALERT_HANDLER_INTR_TEST_REG_OFFSET,
249 dif_alert_handler_irq_t irq,
252 if (alert_handler == NULL || state == NULL) {
257 if (!alert_handler_get_irq_bit_index(irq, &index)) {
261 uint32_t intr_enable_reg = mmio_region_read32(
263 (ptrdiff_t)ALERT_HANDLER_INTR_ENABLE_REG_OFFSET);
266 bool is_enabled = bitfield_bit32_read(intr_enable_reg, index);
267 *state = is_enabled ?
276 dif_alert_handler_irq_t irq,
279 if (alert_handler == NULL) {
284 if (!alert_handler_get_irq_bit_index(irq, &index)) {
288 uint32_t intr_enable_reg = mmio_region_read32(
290 (ptrdiff_t)ALERT_HANDLER_INTR_ENABLE_REG_OFFSET);
294 intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
297 (ptrdiff_t)ALERT_HANDLER_INTR_ENABLE_REG_OFFSET,