Software APIs
uart.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_UART_H_
8#define OPENTITAN_DT_UART_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP uart and top earlgrey.
17 *
18 * This file contains the type definitions and global functions of the uart.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_uart {
30 kDtUartFirst = 0, /**< First instance */
31 kDtUart0 = 0, /**< uart0 */
32 kDtUart1 = 1, /**< uart1 */
33 kDtUart2 = 2, /**< uart2 */
34 kDtUart3 = 3, /**< uart3 */
36
37enum {
38 kDtUartCount = 4, /**< Number of instances */
39};
40
41
42/**
43 * List of register blocks.
44 *
45 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
46 */
47typedef enum dt_uart_reg_block {
48 kDtUartRegBlockCore = 0, /**< */
50
51enum {
52 kDtUartRegBlockCount = 1, /**< Number of register blocks */
53};
54
55
56/** Primary register block (associated with the "primary" set of registers that control the IP). */
57static const dt_uart_reg_block_t kDtUartRegBlockPrimary = kDtUartRegBlockCore;
58
59/**
60 * List of IRQs.
61 *
62 * IRQs are guaranteed to be numbered consecutively from 0.
63 */
64typedef enum dt_uart_irq {
65 kDtUartIrqTxWatermark = 0, /**< raised if the transmit FIFO is past the high-water mark. */
66 kDtUartIrqRxWatermark = 1, /**< raised if the receive FIFO is past the high-water mark. */
67 kDtUartIrqTxDone = 2, /**< raised if the transmit FIFO has emptied and no transmit is ongoing. */
68 kDtUartIrqRxOverflow = 3, /**< raised if the receive FIFO has overflowed. */
69 kDtUartIrqRxFrameErr = 4, /**< raised if a framing error has been detected on receive. */
70 kDtUartIrqRxBreakErr = 5, /**< raised if break condition has been detected on receive. */
71 kDtUartIrqRxTimeout = 6, /**< raised if RX FIFO has characters remaining in the FIFO without being
72 retrieved for the programmed time period. */
73 kDtUartIrqRxParityErr = 7, /**< raised if the receiver has detected a parity error. */
74 kDtUartIrqTxEmpty = 8, /**< raised if the transmit FIFO is empty. */
76
77enum {
78 kDtUartIrqCount = 9, /**< Number of IRQs */
79};
80
81
82/**
83 * List of Alerts.
84 *
85 * Alerts are guaranteed to be numbered consecutively from 0.
86 */
87typedef enum dt_uart_alert {
88 kDtUartAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
90
91enum {
92 kDtUartAlertCount = 1, /**< Number of Alerts */
93};
94
95
96/**
97 * List of clock ports.
98 *
99 * Clock ports are guaranteed to be numbered consecutively from 0.
100 */
101typedef enum dt_uart_clock {
102 kDtUartClockClk = 0, /**< Clock port clk_i */
104
105enum {
106 kDtUartClockCount = 1, /**< Number of clock ports */
107};
108
109
110/**
111 * List of reset ports.
112 *
113 * Reset ports are guaranteed to be numbered consecutively from 0.
114 */
115typedef enum dt_uart_reset {
116 kDtUartResetRst = 0, /**< Reset port rst_ni */
118
119enum {
120 kDtUartResetCount = 1, /**< Number of reset ports */
121};
122
123
124/**
125 * List of peripheral I/O.
126 *
127 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
128 */
129typedef enum dt_uart_periph_io {
130 kDtUartPeriphIoRx = 0, /**< */
131 kDtUartPeriphIoTx = 1, /**< */
133
134enum {
135 kDtUartPeriphIoCount = 2, /**< Number of peripheral I/O */
136};
137
138
139/**
140 * List of supported hardware features.
141 */
142#define OPENTITAN_UART_HAS_PARITY 1
143#define OPENTITAN_UART_HAS_LINE_LOOPBACK 1
144#define OPENTITAN_UART_HAS_SYSTEM_LOOPBACK 1
145#define OPENTITAN_UART_HAS_BAUD_RATE_CONTROL 1
146#define OPENTITAN_UART_HAS_LINE_BREAK 1
147#define OPENTITAN_UART_HAS_FIFO_INTERRUPTS 1
148
149
150
151/**
152 * Get the uart instance from an instance ID
153 *
154 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
155 *
156 * @param inst_id Instance ID.
157 * @return A uart instance.
158 *
159 * **Note:** This function only makes sense if the instance ID has device type uart,
160 * otherwise the returned value is unspecified.
161 */
163
164/**
165 * Get the instance ID of an instance.
166 *
167 * @param dt Instance of uart.
168 * @return The instance ID of that instance.
169 */
171
172/**
173 * Get the register base address of an instance.
174 *
175 * @param dt Instance of uart.
176 * @param reg_block The register block requested.
177 * @return The register base address of the requested block.
178 */
179uint32_t dt_uart_reg_block(
180 dt_uart_t dt,
181 dt_uart_reg_block_t reg_block);
182
183/**
184 * Get the primary register base address of an instance.
185 *
186 * This is just a convenience function, equivalent to
187 * `dt_uart_reg_block(dt, kDtUartRegBlockCore)`
188 *
189 * @param dt Instance of uart.
190 * @return The register base address of the primary register block.
191 */
192static inline uint32_t dt_uart_primary_reg_block(
193 dt_uart_t dt) {
194 return dt_uart_reg_block(dt, kDtUartRegBlockCore);
195}
196
197/**
198 * Get the PLIC ID of a uart IRQ for a given instance.
199 *
200 * If the instance is not connected to the PLIC, this function
201 * will return `kDtPlicIrqIdNone`.
202 *
203 * @param dt Instance of uart.
204 * @param irq A uart IRQ.
205 * @return The PLIC ID of the IRQ of this instance.
206 */
208 dt_uart_t dt,
209 dt_uart_irq_t irq);
210
211/**
212 * Convert a global IRQ ID to a local uart IRQ type.
213 *
214 * @param dt Instance of uart.
215 * @param irq A PLIC ID that belongs to this instance.
216 * @return The uart IRQ, or `kDtUartIrqCount`.
217 *
218 * **Note:** This function assumes that the PLIC ID belongs to the instance
219 * of uart passed in parameter. In other words, it must be the case that
220 * `dt_uart_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
221 * will return `kDtUartIrqCount`.
222 */
224 dt_uart_t dt,
225 dt_plic_irq_id_t irq);
226
227
228/**
229 * Get the alert ID of a uart alert for a given instance.
230 *
231 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
232 * instances where the instance is not connected, the return value is unspecified.
233 *
234 * @param dt Instance of uart.
235 * @param alert A uart alert.
236 * @return The Alert Handler alert ID of the alert of this instance.
237 */
239 dt_uart_t dt,
240 dt_uart_alert_t alert);
241
242/**
243 * Convert a global alert ID to a local uart alert type.
244 *
245 * @param dt Instance of uart.
246 * @param alert A global alert ID that belongs to this instance.
247 * @return The uart alert, or `kDtUartAlertCount`.
248 *
249 * **Note:** This function assumes that the global alert ID belongs to the
250 * instance of uart passed in parameter. In other words, it must be the case
251 * that `dt_uart_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
252 * this function will return `kDtUartAlertCount`.
253 */
255 dt_uart_t dt,
256 dt_alert_id_t alert);
257
258
259/**
260 * Get the peripheral I/O description of an instance.
261 *
262 * @param dt Instance of uart.
263 * @param sig Requested peripheral I/O.
264 * @return Description of the requested peripheral I/O for this instance.
265 */
267 dt_uart_t dt,
269
270/**
271 * Get the clock signal connected to a clock port of an instance.
272 *
273 * @param dt Instance of uart.
274 * @param clk Clock port.
275 * @return Clock signal.
276 */
278 dt_uart_t dt,
279 dt_uart_clock_t clk);
280
281/**
282 * Get the reset signal connected to a reset port of an instance.
283 *
284 * @param dt Instance of uart.
285 * @param rst Reset port.
286 * @return Reset signal.
287 */
289 dt_uart_t dt,
290 dt_uart_reset_t rst);
291
292
293
294#ifdef __cplusplus
295} // extern "C"
296#endif // __cplusplus
297
298#endif // OPENTITAN_DT_UART_H_