Software APIs
dt_rstmgr.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RSTMGR_H_
8#define OPENTITAN_DT_RSTMGR_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP rstmgr and top earlgrey.
17 *
18 * This file contains the type definitions and global functions of the rstmgr.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26
27
28/**
29 * List of instances.
30 */
31typedef enum dt_rstmgr {
32 kDtRstmgrAon = 0, /**< rstmgr_aon */
33 kDtRstmgrFirst = 0, /**< \internal First instance */
34 kDtRstmgrCount = 1, /**< \internal Number of instances */
36
37/**
38 * List of register blocks.
39 *
40 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
41 */
42typedef enum dt_rstmgr_reg_block {
43 kDtRstmgrRegBlockCore = 0, /**< */
44 kDtRstmgrRegBlockCount = 1, /**< \internal Number of register blocks */
46
47/** Primary register block (associated with the "primary" set of registers that control the IP). */
48static const dt_rstmgr_reg_block_t kDtRstmgrRegBlockPrimary = kDtRstmgrRegBlockCore;
49
50/**
51 * List of Alerts.
52 *
53 * Alerts are guaranteed to be numbered consecutively from 0.
54 */
55typedef enum dt_rstmgr_alert {
56 kDtRstmgrAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal structural fault is detected.
57Structural faults include errors such as sparse fsm errors and tlul integrity errors. */
58 kDtRstmgrAlertFatalCnstyFault = 1, /**< This fatal alert is triggered when a reset consistency fault is detected.
59It is separated from the category above for clearer error collection and debug. */
60 kDtRstmgrAlertCount = 2, /**< \internal Number of Alerts */
62
63/**
64 * List of clock ports.
65 *
66 * Clock ports are guaranteed to be numbered consecutively from 0.
67 */
68typedef enum dt_rstmgr_clock {
69 kDtRstmgrClockClk = 0, /**< Clock port clk_i */
70 kDtRstmgrClockAon = 1, /**< Clock port clk_aon_i */
71 kDtRstmgrClockIoDiv4 = 2, /**< Clock port clk_io_div4_i */
72 kDtRstmgrClockMain = 3, /**< Clock port clk_main_i */
73 kDtRstmgrClockIo = 4, /**< Clock port clk_io_i */
74 kDtRstmgrClockIoDiv2 = 5, /**< Clock port clk_io_div2_i */
75 kDtRstmgrClockUsb = 6, /**< Clock port clk_usb_i */
76 kDtRstmgrClockPor = 7, /**< Clock port clk_por_i */
77 kDtRstmgrClockCount = 8, /**< \internal Number of clock ports */
79
80/**
81 * List of reset ports.
82 *
83 * Reset ports are guaranteed to be numbered consecutively from 0.
84 */
85typedef enum dt_rstmgr_reset {
86 kDtRstmgrResetRst = 0, /**< Reset port rst_ni */
87 kDtRstmgrResetPor = 1, /**< Reset port rst_por_ni */
88 kDtRstmgrResetCount = 2, /**< \internal Number of reset ports */
90
91/**
92 * List of supported hardware features.
93 */
94#define OPENTITAN_RSTMGR_HAS_SW_RST_CHIP_RESET 1
95#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_DEVICE_REQUEST 1
96#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_DEVICE_ENABLE 1
97#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST0_REQUEST 1
98#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST0_ENABLE 1
99#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST1_REQUEST 1
100#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST1_ENABLE 1
101#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_REQUEST 1
102#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_ENABLE 1
103#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_AON_REQUEST 1
104#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_AON_ENABLE 1
105#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C0_REQUEST 1
106#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C0_ENABLE 1
107#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C1_REQUEST 1
108#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C1_ENABLE 1
109#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C2_REQUEST 1
110#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C2_ENABLE 1
111#define OPENTITAN_RSTMGR_HAS_RESET_INFO_CAPTURE 1
112#define OPENTITAN_RSTMGR_HAS_RESET_INFO_CLEAR 1
113#define OPENTITAN_RSTMGR_HAS_ALERT_INFO_CAPTURE 1
114#define OPENTITAN_RSTMGR_HAS_ALERT_INFO_ENABLE 1
115#define OPENTITAN_RSTMGR_HAS_CPU_INFO_CAPTURE 1
116#define OPENTITAN_RSTMGR_HAS_CPU_INFO_ENABLE 1
117#define OPENTITAN_RSTMGR_HAS_ALERT_HANDLER_RESET_STATUS 1
118
119
120
121/**
122 * Get the rstmgr instance from an instance ID
123 *
124 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
125 *
126 * @param inst_id Instance ID.
127 * @return A rstmgr instance.
128 *
129 * **Note:** This function only makes sense if the instance ID has device type rstmgr,
130 * otherwise the returned value is unspecified.
131 */
133
134/**
135 * Get the instance ID of an instance.
136 *
137 * @param dt Instance of rstmgr.
138 * @return The instance ID of that instance.
139 */
141
142/**
143 * Get the register base address of an instance.
144 *
145 * @param dt Instance of rstmgr.
146 * @param reg_block The register block requested.
147 * @return The register base address of the requested block.
148 */
149uint32_t dt_rstmgr_reg_block(
150 dt_rstmgr_t dt,
151 dt_rstmgr_reg_block_t reg_block);
152
153/**
154 * Get the primary register base address of an instance.
155 *
156 * This is just a convenience function, equivalent to
157 * `dt_rstmgr_reg_block(dt, kDtRstmgrRegBlockCore)`
158 *
159 * @param dt Instance of rstmgr.
160 * @return The register base address of the primary register block.
161 */
162static inline uint32_t dt_rstmgr_primary_reg_block(
163 dt_rstmgr_t dt) {
164 return dt_rstmgr_reg_block(dt, kDtRstmgrRegBlockCore);
165}
166
167
168/**
169 * Get the alert ID of a rstmgr alert for a given instance.
170 *
171 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
172 * instances where the instance is not connected, the return value is unspecified.
173 *
174 * @param dt Instance of rstmgr.
175 * @param alert A rstmgr alert.
176 * @return The Alert Handler alert ID of the alert of this instance.
177 */
179 dt_rstmgr_t dt,
180 dt_rstmgr_alert_t alert);
181
182/**
183 * Convert a global alert ID to a local rstmgr alert type.
184 *
185 * @param dt Instance of rstmgr.
186 * @param alert A global alert ID that belongs to this instance.
187 * @return The rstmgr alert, or `kDtRstmgrAlertCount`.
188 *
189 * **Note:** This function assumes that the global alert ID belongs to the
190 * instance of rstmgr passed in parameter. In other words, it must be the case
191 * that `dt_rstmgr_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
192 * this function will return `kDtRstmgrAlertCount`.
193 */
195 dt_rstmgr_t dt,
196 dt_alert_id_t alert);
197
198
199
200/**
201 * Get the clock signal connected to a clock port of an instance.
202 *
203 * @param dt Instance of rstmgr.
204 * @param clk Clock port.
205 * @return Clock signal.
206 */
208 dt_rstmgr_t dt,
210
211/**
212 * Get the reset signal connected to a reset port of an instance.
213 *
214 * @param dt Instance of rstmgr.
215 * @param rst Reset port.
216 * @return Reset signal.
217 */
219 dt_rstmgr_t dt,
221
222
223
224/**
225 * Get the number of software resets.
226 *
227 * @param dt Instance of rstmgr.
228 * @return Number of software resets.
229 */
231
232/**
233 * Get the reset ID of a software reset.
234 *
235 * The resets are ordered in the same way as they appear in the registers.
236 *
237 * @param dt Instance of rstmgr.
238 * @param idx Index of the software reset, between 0 and `dt_rstmgr_sw_reset_count(dt)-1`.
239 * @return Reset ID, or `kDtResetUnknown` for invalid parameters.
240 */
242
243/**
244 * Description of a reset request source.
245 *
246 * A reset request source is always identified by the instance ID of the module where it comes
247 * from. In principle, some instances could have several reset requests. If this is the case,
248 * the `rst_req` can be used to distinguish between those. It should be cast to the
249 * `dt_<ip>_reset_req_t` type of the corresponding IP.
250 *
251 * WARNING At the moment, three hardcoded reset requests are treated specially and have their
252 * `reset_req` field set to `0` because there is no corresponding reset request declared by those
253 * IPs:
254 * - the main power glitch reset request, coming from the `pwrmgr`,
255 * - the escalation reset request, coming from the `alert_handler`,
256 * - the non-debug-module reset request, coming from the `rv_dm`.
257 */
259 dt_instance_id_t inst_id; /**< Instance ID of the source of this reset request. */
260 size_t reset_req; /**< Index of the reset request signal for that instance. */
262
263
264/**
265 * Get the number of hardware reset requests.
266 *
267 * @param dt Instance of rstmgr.
268 * @return Number of reset requests.
269 */
271
272/**
273 * Get the description of a reset request.
274 *
275 * The reset requests are ordered as they appear in the registers.
276 *
277 * @param dt Instance of rstmgr.
278 * @param idx Index of the reset request source, between 0 and
279 * `dt_pwrmgr_hw_reset_req_src_count(dt)-1`.
280 * @return Description of the reset.
281 */
283
284
285
286#ifdef __cplusplus
287} // extern "C"
288#endif // __cplusplus
289
290#endif // OPENTITAN_DT_RSTMGR_H_