Software APIs
dt_rstmgr.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RSTMGR_H_
8#define OPENTITAN_DT_RSTMGR_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP rstmgr and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the rstmgr.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_rstmgr {
24 kDtRstmgrAon = 0, /**< rstmgr_aon */
25 kDtRstmgrFirst = 0, /**< \internal First instance */
26 kDtRstmgrCount = 1, /**< \internal Number of instances */
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
34typedef enum dt_rstmgr_reg_block {
35 kDtRstmgrRegBlockCore = 0, /**< */
36 kDtRstmgrRegBlockCount = 1, /**< \internal Number of register blocks */
38
39/** Primary register block (associated with the "primary" set of registers that control the IP). */
40static const dt_rstmgr_reg_block_t kDtRstmgrRegBlockPrimary = kDtRstmgrRegBlockCore;
41
42/**
43 * List of Alerts.
44 *
45 * Alerts are guaranteed to be numbered consecutively from 0.
46 */
47typedef enum dt_rstmgr_alert {
48 kDtRstmgrAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal structural fault is detected.
49Structural faults include errors such as sparse fsm errors and tlul integrity errors. */
50 kDtRstmgrAlertFatalCnstyFault = 1, /**< This fatal alert is triggered when a reset consistency fault is detected.
51It is separated from the category above for clearer error collection and debug. */
52 kDtRstmgrAlertCount = 2, /**< \internal Number of Alerts */
54
55/**
56 * List of clock ports.
57 *
58 * Clock ports are guaranteed to be numbered consecutively from 0.
59 */
60typedef enum dt_rstmgr_clock {
61 kDtRstmgrClockClk = 0, /**< Clock port clk_i */
62 kDtRstmgrClockAon = 1, /**< Clock port clk_aon_i */
63 kDtRstmgrClockIoDiv4 = 2, /**< Clock port clk_io_div4_i */
64 kDtRstmgrClockMain = 3, /**< Clock port clk_main_i */
65 kDtRstmgrClockIo = 4, /**< Clock port clk_io_i */
66 kDtRstmgrClockIoDiv2 = 5, /**< Clock port clk_io_div2_i */
67 kDtRstmgrClockUsb = 6, /**< Clock port clk_usb_i */
68 kDtRstmgrClockPor = 7, /**< Clock port clk_por_i */
69 kDtRstmgrClockCount = 8, /**< \internal Number of clock ports */
71
72/**
73 * List of reset ports.
74 *
75 * Reset ports are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_rstmgr_reset {
78 kDtRstmgrResetRst = 0, /**< Reset port rst_ni */
79 kDtRstmgrResetPor = 1, /**< Reset port rst_por_ni */
80 kDtRstmgrResetCount = 2, /**< \internal Number of reset ports */
82
83/**
84 * List of supported hardware features.
85 */
86#define OPENTITAN_RSTMGR_HAS_SW_RST_CHIP_RESET 1
87#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_DEVICE_REQUEST 1
88#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_DEVICE_ENABLE 1
89#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST0_REQUEST 1
90#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST0_ENABLE 1
91#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST1_REQUEST 1
92#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST1_ENABLE 1
93#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_REQUEST 1
94#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_ENABLE 1
95#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_AON_REQUEST 1
96#define OPENTITAN_RSTMGR_HAS_SW_RST_USB_AON_ENABLE 1
97#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C0_REQUEST 1
98#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C0_ENABLE 1
99#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C1_REQUEST 1
100#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C1_ENABLE 1
101#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C2_REQUEST 1
102#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C2_ENABLE 1
103#define OPENTITAN_RSTMGR_HAS_RESET_INFO_CAPTURE 1
104#define OPENTITAN_RSTMGR_HAS_RESET_INFO_CLEAR 1
105#define OPENTITAN_RSTMGR_HAS_ALERT_INFO_CAPTURE 1
106#define OPENTITAN_RSTMGR_HAS_ALERT_INFO_ENABLE 1
107#define OPENTITAN_RSTMGR_HAS_CPU_INFO_CAPTURE 1
108#define OPENTITAN_RSTMGR_HAS_CPU_INFO_ENABLE 1
109#define OPENTITAN_RSTMGR_HAS_ALERT_HANDLER_RESET_STATUS 1
110
111
112
113/**
114 * Get the rstmgr instance from an instance ID
115 *
116 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
117 *
118 * @param inst_id Instance ID.
119 * @return A rstmgr instance.
120 *
121 * **Note:** This function only makes sense if the instance ID has device type rstmgr,
122 * otherwise the returned value is unspecified.
123 */
125
126/**
127 * Get the instance ID of an instance.
128 *
129 * @param dt Instance of rstmgr.
130 * @return The instance ID of that instance.
131 */
133
134/**
135 * Get the register base address of an instance.
136 *
137 * @param dt Instance of rstmgr.
138 * @param reg_block The register block requested.
139 * @return The register base address of the requested block.
140 */
141uint32_t dt_rstmgr_reg_block(
142 dt_rstmgr_t dt,
143 dt_rstmgr_reg_block_t reg_block);
144
145/**
146 * Get the primary register base address of an instance.
147 *
148 * This is just a convenience function, equivalent to
149 * `dt_rstmgr_reg_block(dt, kDtRstmgrRegBlockCore)`
150 *
151 * @param dt Instance of rstmgr.
152 * @return The register base address of the primary register block.
153 */
154static inline uint32_t dt_rstmgr_primary_reg_block(
155 dt_rstmgr_t dt) {
156 return dt_rstmgr_reg_block(dt, kDtRstmgrRegBlockCore);
157}
158
159
160/**
161 * Get the alert ID of a rstmgr alert for a given instance.
162 *
163 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
164 * instances where the instance is not connected, the return value is unspecified.
165 *
166 * @param dt Instance of rstmgr.
167 * @param alert A rstmgr alert.
168 * @return The Alert Handler alert ID of the alert of this instance.
169 */
171 dt_rstmgr_t dt,
172 dt_rstmgr_alert_t alert);
173
174/**
175 * Convert a global alert ID to a local rstmgr alert type.
176 *
177 * @param dt Instance of rstmgr.
178 * @param alert A global alert ID that belongs to this instance.
179 * @return The rstmgr alert, or `kDtRstmgrAlertCount`.
180 *
181 * **Note:** This function assumes that the global alert ID belongs to the
182 * instance of rstmgr passed in parameter. In other words, it must be the case
183 * that `dt_rstmgr_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
184 * this function will return `kDtRstmgrAlertCount`.
185 */
187 dt_rstmgr_t dt,
188 dt_alert_id_t alert);
189
190
191
192/**
193 * Get the clock signal connected to a clock port of an instance.
194 *
195 * @param dt Instance of rstmgr.
196 * @param clk Clock port.
197 * @return Clock signal.
198 */
200 dt_rstmgr_t dt,
202
203/**
204 * Get the reset signal connected to a reset port of an instance.
205 *
206 * @param dt Instance of rstmgr.
207 * @param rst Reset port.
208 * @return Reset signal.
209 */
211 dt_rstmgr_t dt,
213
214
215/**
216 * Get the number of software resets.
217 *
218 * @param dt Instance of rstmgr.
219 * @return Number of software resets.
220 */
222
223/**
224 * Get the reset ID of a software reset.
225 *
226 * The resets are ordered in the same way as they appear in the registers.
227 *
228 * @param dt Instance of rstmgr.
229 * @param idx Index of the software reset, between 0 and `dt_rstmgr_sw_reset_count(dt)-1`.
230 * @return Reset ID, or `kDtResetUnknown` for invalid parameters.
231 */
233
234/**
235 * Description of a reset request source.
236 *
237 * A reset request source is always identified by the instance ID of the module where it comes
238 * from. In principle, some instances could have several reset requests. If this is the case,
239 * the `rst_req` can be used to distinguish between those. It should be cast to the
240 * `dt_<ip>_reset_req_t` type of the corresponding IP.
241 *
242 * WARNING At the moment, three hardcoded reset requests are treated specially and have their
243 * `rst_req` field set to `0` because there is no corresponding reset request declared by those IPs:
244 * - the main power glitch reset request, coming from the `pwrmgr`,
245 * - the escalation reset request, coming from the `alert_handler`,
246 * - the non-debug-module reset request, coming from the `rv_dm`.
247 */
249 dt_instance_id_t inst_id; /**< Instance ID of the source of this reset request. */
250 size_t reset_req; /**< Index of the reset request signal for that instance. */
252
253
254/**
255 * Get the number of hardware reset requests.
256 *
257 * @param dt Instance of rstmgr.
258 * @return Number of reset requests.
259 */
261
262/**
263 * Get the description of a reset request.
264 *
265 * The reset requests are ordered as they appear in the registers.
266 *
267 * @param dt Instance of rstmgr.
268 * @param idx Index of the reset request source, between 0 and
269 * `dt_pwrmgr_hw_reset_req_src_count(dt)-1`.
270 * @return Description of the reset.
271 */
273
274
275#endif // OPENTITAN_DT_RSTMGR_H_