Software APIs
dt_lc_ctrl.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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#ifndef OPENTITAN_DT_LC_CTRL_H_
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#define OPENTITAN_DT_LC_CTRL_H_
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/**
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* @file
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* @brief Device Tables (DT) for IP lc_ctrl and top earlgrey.
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*
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* This file contains the type definitions and global functions of the lc_ctrl.
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*/
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#include "
dt_api.h
"
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#include <stdint.h>
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/**
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* List of instances.
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*/
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typedef
enum
dt_lc_ctrl
{
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kDtLcCtrl
= 0,
/**< lc_ctrl */
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kDtLcCtrlFirst = 0,
/**< \internal First instance */
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kDtLcCtrlCount = 1,
/**< \internal Number of instances */
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}
dt_lc_ctrl_t
;
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/**
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* List of register blocks.
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*
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* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_lc_ctrl_reg_block
{
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kDtLcCtrlRegBlockRegs = 0,
/**< */
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kDtLcCtrlRegBlockDmi = 1,
/**< */
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kDtLcCtrlRegBlockCount = 2,
/**< \internal Number of register blocks */
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}
dt_lc_ctrl_reg_block_t
;
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/** Primary register block (associated with the "primary" set of registers that control the IP). */
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static
const
dt_lc_ctrl_reg_block_t
kDtLcCtrlRegBlockPrimary = kDtLcCtrlRegBlockRegs;
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/**
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* List of Alerts.
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*
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* Alerts are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_lc_ctrl_alert
{
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kDtLcCtrlAlertFatalProgError
= 0,
/**< This alert triggers if an error occurred during an OTP programming operation. */
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kDtLcCtrlAlertFatalStateError
= 1,
/**< This alert triggers if an error in the life cycle state or life cycle controller FSM is detected. */
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kDtLcCtrlAlertFatalBusIntegError
= 2,
/**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
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kDtLcCtrlAlertCount = 3,
/**< \internal Number of Alerts */
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}
dt_lc_ctrl_alert_t
;
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/**
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* List of clock ports.
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*
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* Clock ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_lc_ctrl_clock
{
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kDtLcCtrlClockClk
= 0,
/**< Clock port clk_i */
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kDtLcCtrlClockKmac
= 1,
/**< Clock port clk_kmac_i */
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kDtLcCtrlClockCount = 2,
/**< \internal Number of clock ports */
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}
dt_lc_ctrl_clock_t
;
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/**
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* List of reset ports.
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*
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* Reset ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_lc_ctrl_reset
{
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kDtLcCtrlResetRst
= 0,
/**< Reset port rst_ni */
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kDtLcCtrlResetKmac
= 1,
/**< Reset port rst_kmac_ni */
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kDtLcCtrlResetCount = 2,
/**< \internal Number of reset ports */
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}
dt_lc_ctrl_reset_t
;
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/**
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* List of supported hardware features.
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*/
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#define OPENTITAN_LC_CTRL_HAS_STATE_RAW 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_TEST_UNLOCKED 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_TEST_LOCKED 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_DEV 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_PROD 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_PROD_END 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_RMA 1
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#define OPENTITAN_LC_CTRL_HAS_STATE_SCRAP 1
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#define OPENTITAN_LC_CTRL_HAS_ACCESS_JTAG 1
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#define OPENTITAN_LC_CTRL_HAS_ACCESS_EXT_CLK 1
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#define OPENTITAN_LC_CTRL_HAS_AUTHENTICATED_TRANSITIONS 1
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#define OPENTITAN_LC_CTRL_HAS_LOGICAL_SCRAP 1
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/**
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* Get the lc_ctrl instance from an instance ID
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*
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* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
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*
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* @param inst_id Instance ID.
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* @return A lc_ctrl instance.
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*
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* **Note:** This function only makes sense if the instance ID has device type lc_ctrl,
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* otherwise the returned value is unspecified.
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*/
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dt_lc_ctrl_t
dt_lc_ctrl_from_instance_id
(
dt_instance_id_t
inst_id);
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/**
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* Get the instance ID of an instance.
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*
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* @param dt Instance of lc_ctrl.
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* @return The instance ID of that instance.
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*/
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dt_instance_id_t
dt_lc_ctrl_instance_id
(
dt_lc_ctrl_t
dt);
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/**
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* Get the register base address of an instance.
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*
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* @param dt Instance of lc_ctrl.
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* @param reg_block The register block requested.
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* @return The register base address of the requested block.
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*/
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uint32_t
dt_lc_ctrl_reg_block
(
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dt_lc_ctrl_t
dt,
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dt_lc_ctrl_reg_block_t
reg_block);
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/**
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* Get the primary register base address of an instance.
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*
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* This is just a convenience function, equivalent to
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* `dt_lc_ctrl_reg_block(dt, kDtLcCtrlRegBlockRegs)`
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*
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* @param dt Instance of lc_ctrl.
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* @return The register base address of the primary register block.
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*/
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static
inline
uint32_t dt_lc_ctrl_primary_reg_block(
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dt_lc_ctrl_t
dt) {
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return
dt_lc_ctrl_reg_block
(dt, kDtLcCtrlRegBlockRegs);
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}
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/**
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* Get the alert ID of a lc_ctrl alert for a given instance.
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*
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* **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
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* instances where the instance is not connected, the return value is unspecified.
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*
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* @param dt Instance of lc_ctrl.
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* @param alert A lc_ctrl alert.
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* @return The Alert Handler alert ID of the alert of this instance.
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*/
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dt_alert_id_t
dt_lc_ctrl_alert_to_alert_id
(
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dt_lc_ctrl_t
dt,
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dt_lc_ctrl_alert_t
alert);
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/**
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* Convert a global alert ID to a local lc_ctrl alert type.
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*
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* @param dt Instance of lc_ctrl.
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* @param alert A global alert ID that belongs to this instance.
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* @return The lc_ctrl alert, or `kDtLcCtrlAlertCount`.
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*
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* **Note:** This function assumes that the global alert ID belongs to the
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* instance of lc_ctrl passed in parameter. In other words, it must be the case
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* that `dt_lc_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
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* this function will return `kDtLcCtrlAlertCount`.
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*/
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dt_lc_ctrl_alert_t
dt_lc_ctrl_alert_from_alert_id
(
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dt_lc_ctrl_t
dt,
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dt_alert_id_t
alert);
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/**
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* Get the clock signal connected to a clock port of an instance.
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*
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* @param dt Instance of lc_ctrl.
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* @param clk Clock port.
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* @return Clock signal.
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*/
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dt_clock_t
dt_lc_ctrl_clock
(
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dt_lc_ctrl_t
dt,
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dt_lc_ctrl_clock_t
clk);
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/**
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* Get the reset signal connected to a reset port of an instance.
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*
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* @param dt Instance of lc_ctrl.
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* @param rst Reset port.
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* @return Reset signal.
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*/
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dt_reset_t
dt_lc_ctrl_reset
(
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dt_lc_ctrl_t
dt,
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dt_lc_ctrl_reset_t
rst);
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#endif
// OPENTITAN_DT_LC_CTRL_H_
(earlgrey)
hw
top
dt
dt_lc_ctrl.h
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