Software APIs
dt_lc_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_LC_CTRL_H_
8#define OPENTITAN_DT_LC_CTRL_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP lc_ctrl and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the lc_ctrl.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_lc_ctrl {
26 kDtLcCtrl = 0, /**< lc_ctrl */
27 kDtLcCtrlFirst = 0, /**< \internal First instance */
28 kDtLcCtrlCount = 1, /**< \internal Number of instances */
30
31/**
32 * List of register blocks.
33 *
34 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
35 */
37 kDtLcCtrlRegBlockRegs = 0, /**< */
38 kDtLcCtrlRegBlockDmi = 1, /**< */
39 kDtLcCtrlRegBlockCount = 2, /**< \internal Number of register blocks */
41
42/** Primary register block (associated with the "primary" set of registers that control the IP). */
43static const dt_lc_ctrl_reg_block_t kDtLcCtrlRegBlockPrimary = kDtLcCtrlRegBlockRegs;
44
45/**
46 * List of Alerts.
47 *
48 * Alerts are guaranteed to be numbered consecutively from 0.
49 */
50typedef enum dt_lc_ctrl_alert {
51 kDtLcCtrlAlertFatalProgError = 0, /**< This alert triggers if an error occurred during an OTP programming operation. */
52 kDtLcCtrlAlertFatalStateError = 1, /**< This alert triggers if an error in the life cycle state or life cycle controller FSM is detected. */
53 kDtLcCtrlAlertFatalBusIntegError = 2, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
54 kDtLcCtrlAlertCount = 3, /**< \internal Number of Alerts */
56
57/**
58 * List of clock ports.
59 *
60 * Clock ports are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_lc_ctrl_clock {
63 kDtLcCtrlClockClk = 0, /**< Clock port clk_i */
64 kDtLcCtrlClockKmac = 1, /**< Clock port clk_kmac_i */
65 kDtLcCtrlClockCount = 2, /**< \internal Number of clock ports */
67
68/**
69 * List of reset ports.
70 *
71 * Reset ports are guaranteed to be numbered consecutively from 0.
72 */
73typedef enum dt_lc_ctrl_reset {
74 kDtLcCtrlResetRst = 0, /**< Reset port rst_ni */
75 kDtLcCtrlResetKmac = 1, /**< Reset port rst_kmac_ni */
76 kDtLcCtrlResetCount = 2, /**< \internal Number of reset ports */
78
79/**
80 * List of supported hardware features.
81 */
82#define OPENTITAN_LC_CTRL_HAS_STATE_RAW 1
83#define OPENTITAN_LC_CTRL_HAS_STATE_TEST_UNLOCKED 1
84#define OPENTITAN_LC_CTRL_HAS_STATE_TEST_LOCKED 1
85#define OPENTITAN_LC_CTRL_HAS_STATE_DEV 1
86#define OPENTITAN_LC_CTRL_HAS_STATE_PROD 1
87#define OPENTITAN_LC_CTRL_HAS_STATE_PROD_END 1
88#define OPENTITAN_LC_CTRL_HAS_STATE_RMA 1
89#define OPENTITAN_LC_CTRL_HAS_STATE_SCRAP 1
90#define OPENTITAN_LC_CTRL_HAS_ACCESS_JTAG 1
91#define OPENTITAN_LC_CTRL_HAS_ACCESS_EXT_CLK 1
92#define OPENTITAN_LC_CTRL_HAS_AUTHENTICATED_TRANSITIONS 1
93#define OPENTITAN_LC_CTRL_HAS_LOGICAL_SCRAP 1
94
95
96
97/**
98 * Get the lc_ctrl instance from an instance ID
99 *
100 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
101 *
102 * @param inst_id Instance ID.
103 * @return A lc_ctrl instance.
104 *
105 * **Note:** This function only makes sense if the instance ID has device type lc_ctrl,
106 * otherwise the returned value is unspecified.
107 */
109
110/**
111 * Get the instance ID of an instance.
112 *
113 * @param dt Instance of lc_ctrl.
114 * @return The instance ID of that instance.
115 */
117
118/**
119 * Get the register base address of an instance.
120 *
121 * @param dt Instance of lc_ctrl.
122 * @param reg_block The register block requested.
123 * @return The register base address of the requested block.
124 */
125uint32_t dt_lc_ctrl_reg_block(
126 dt_lc_ctrl_t dt,
127 dt_lc_ctrl_reg_block_t reg_block);
128
129/**
130 * Get the primary register base address of an instance.
131 *
132 * This is just a convenience function, equivalent to
133 * `dt_lc_ctrl_reg_block(dt, kDtLcCtrlRegBlockRegs)`
134 *
135 * @param dt Instance of lc_ctrl.
136 * @return The register base address of the primary register block.
137 */
138static inline uint32_t dt_lc_ctrl_primary_reg_block(
139 dt_lc_ctrl_t dt) {
140 return dt_lc_ctrl_reg_block(dt, kDtLcCtrlRegBlockRegs);
141}
142
143
144/**
145 * Get the alert ID of a lc_ctrl alert for a given instance.
146 *
147 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
148 * instances where the instance is not connected, the return value is unspecified.
149 *
150 * @param dt Instance of lc_ctrl.
151 * @param alert A lc_ctrl alert.
152 * @return The Alert Handler alert ID of the alert of this instance.
153 */
155 dt_lc_ctrl_t dt,
156 dt_lc_ctrl_alert_t alert);
157
158/**
159 * Convert a global alert ID to a local lc_ctrl alert type.
160 *
161 * @param dt Instance of lc_ctrl.
162 * @param alert A global alert ID that belongs to this instance.
163 * @return The lc_ctrl alert, or `kDtLcCtrlAlertCount`.
164 *
165 * **Note:** This function assumes that the global alert ID belongs to the
166 * instance of lc_ctrl passed in parameter. In other words, it must be the case
167 * that `dt_lc_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
168 * this function will return `kDtLcCtrlAlertCount`.
169 */
171 dt_lc_ctrl_t dt,
172 dt_alert_id_t alert);
173
174
175
176/**
177 * Get the clock signal connected to a clock port of an instance.
178 *
179 * @param dt Instance of lc_ctrl.
180 * @param clk Clock port.
181 * @return Clock signal.
182 */
184 dt_lc_ctrl_t dt,
186
187/**
188 * Get the reset signal connected to a reset port of an instance.
189 *
190 * @param dt Instance of lc_ctrl.
191 * @param rst Reset port.
192 * @return Reset signal.
193 */
195 dt_lc_ctrl_t dt,
197
198
199
200#endif // OPENTITAN_DT_LC_CTRL_H_