Software APIs
dt_gpio.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_GPIO_H_
8#define OPENTITAN_DT_GPIO_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP gpio and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the gpio.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_gpio {
24 kDtGpio = 0, /**< gpio */
25 kDtGpioFirst = 0, /**< \internal First instance */
26 kDtGpioCount = 1, /**< \internal Number of instances */
27} dt_gpio_t;
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
34typedef enum dt_gpio_reg_block {
35 kDtGpioRegBlockCore = 0, /**< */
36 kDtGpioRegBlockCount = 1, /**< \internal Number of register blocks */
37} dt_gpio_reg_block_t;
38
39/** Primary register block (associated with the "primary" set of registers that control the IP). */
40static const dt_gpio_reg_block_t kDtGpioRegBlockPrimary = kDtGpioRegBlockCore;
41
42/**
43 * List of IRQs.
44 *
45 * IRQs are guaranteed to be numbered consecutively from 0.
46 */
47typedef enum dt_gpio_irq {
48 kDtGpioIrqGpio0 = 0, /**< raised if any of GPIO pin detects configured interrupt mode */
49 kDtGpioIrqGpio1 = 1, /**< raised if any of GPIO pin detects configured interrupt mode */
50 kDtGpioIrqGpio2 = 2, /**< raised if any of GPIO pin detects configured interrupt mode */
51 kDtGpioIrqGpio3 = 3, /**< raised if any of GPIO pin detects configured interrupt mode */
52 kDtGpioIrqGpio4 = 4, /**< raised if any of GPIO pin detects configured interrupt mode */
53 kDtGpioIrqGpio5 = 5, /**< raised if any of GPIO pin detects configured interrupt mode */
54 kDtGpioIrqGpio6 = 6, /**< raised if any of GPIO pin detects configured interrupt mode */
55 kDtGpioIrqGpio7 = 7, /**< raised if any of GPIO pin detects configured interrupt mode */
56 kDtGpioIrqGpio8 = 8, /**< raised if any of GPIO pin detects configured interrupt mode */
57 kDtGpioIrqGpio9 = 9, /**< raised if any of GPIO pin detects configured interrupt mode */
58 kDtGpioIrqGpio10 = 10, /**< raised if any of GPIO pin detects configured interrupt mode */
59 kDtGpioIrqGpio11 = 11, /**< raised if any of GPIO pin detects configured interrupt mode */
60 kDtGpioIrqGpio12 = 12, /**< raised if any of GPIO pin detects configured interrupt mode */
61 kDtGpioIrqGpio13 = 13, /**< raised if any of GPIO pin detects configured interrupt mode */
62 kDtGpioIrqGpio14 = 14, /**< raised if any of GPIO pin detects configured interrupt mode */
63 kDtGpioIrqGpio15 = 15, /**< raised if any of GPIO pin detects configured interrupt mode */
64 kDtGpioIrqGpio16 = 16, /**< raised if any of GPIO pin detects configured interrupt mode */
65 kDtGpioIrqGpio17 = 17, /**< raised if any of GPIO pin detects configured interrupt mode */
66 kDtGpioIrqGpio18 = 18, /**< raised if any of GPIO pin detects configured interrupt mode */
67 kDtGpioIrqGpio19 = 19, /**< raised if any of GPIO pin detects configured interrupt mode */
68 kDtGpioIrqGpio20 = 20, /**< raised if any of GPIO pin detects configured interrupt mode */
69 kDtGpioIrqGpio21 = 21, /**< raised if any of GPIO pin detects configured interrupt mode */
70 kDtGpioIrqGpio22 = 22, /**< raised if any of GPIO pin detects configured interrupt mode */
71 kDtGpioIrqGpio23 = 23, /**< raised if any of GPIO pin detects configured interrupt mode */
72 kDtGpioIrqGpio24 = 24, /**< raised if any of GPIO pin detects configured interrupt mode */
73 kDtGpioIrqGpio25 = 25, /**< raised if any of GPIO pin detects configured interrupt mode */
74 kDtGpioIrqGpio26 = 26, /**< raised if any of GPIO pin detects configured interrupt mode */
75 kDtGpioIrqGpio27 = 27, /**< raised if any of GPIO pin detects configured interrupt mode */
76 kDtGpioIrqGpio28 = 28, /**< raised if any of GPIO pin detects configured interrupt mode */
77 kDtGpioIrqGpio29 = 29, /**< raised if any of GPIO pin detects configured interrupt mode */
78 kDtGpioIrqGpio30 = 30, /**< raised if any of GPIO pin detects configured interrupt mode */
79 kDtGpioIrqGpio31 = 31, /**< raised if any of GPIO pin detects configured interrupt mode */
80 kDtGpioIrqCount = 32, /**< \internal Number of IRQs */
81} dt_gpio_irq_t;
82
83/**
84 * List of Alerts.
85 *
86 * Alerts are guaranteed to be numbered consecutively from 0.
87 */
88typedef enum dt_gpio_alert {
89 kDtGpioAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
90 kDtGpioAlertCount = 1, /**< \internal Number of Alerts */
91} dt_gpio_alert_t;
92
93/**
94 * List of clock ports.
95 *
96 * Clock ports are guaranteed to be numbered consecutively from 0.
97 */
98typedef enum dt_gpio_clock {
99 kDtGpioClockClk = 0, /**< Clock port clk_i */
100 kDtGpioClockCount = 1, /**< \internal Number of clock ports */
101} dt_gpio_clock_t;
102
103/**
104 * List of reset ports.
105 *
106 * Reset ports are guaranteed to be numbered consecutively from 0.
107 */
108typedef enum dt_gpio_reset {
109 kDtGpioResetRst = 0, /**< Reset port rst_ni */
110 kDtGpioResetCount = 1, /**< \internal Number of reset ports */
111} dt_gpio_reset_t;
112
113/**
114 * List of peripheral I/O.
115 *
116 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
117 */
118typedef enum dt_gpio_periph_io {
119 kDtGpioPeriphIoGpio0 = 0, /**< */
120 kDtGpioPeriphIoGpio1 = 1, /**< */
121 kDtGpioPeriphIoGpio2 = 2, /**< */
122 kDtGpioPeriphIoGpio3 = 3, /**< */
123 kDtGpioPeriphIoGpio4 = 4, /**< */
124 kDtGpioPeriphIoGpio5 = 5, /**< */
125 kDtGpioPeriphIoGpio6 = 6, /**< */
126 kDtGpioPeriphIoGpio7 = 7, /**< */
127 kDtGpioPeriphIoGpio8 = 8, /**< */
128 kDtGpioPeriphIoGpio9 = 9, /**< */
129 kDtGpioPeriphIoGpio10 = 10, /**< */
130 kDtGpioPeriphIoGpio11 = 11, /**< */
131 kDtGpioPeriphIoGpio12 = 12, /**< */
132 kDtGpioPeriphIoGpio13 = 13, /**< */
133 kDtGpioPeriphIoGpio14 = 14, /**< */
134 kDtGpioPeriphIoGpio15 = 15, /**< */
135 kDtGpioPeriphIoGpio16 = 16, /**< */
136 kDtGpioPeriphIoGpio17 = 17, /**< */
137 kDtGpioPeriphIoGpio18 = 18, /**< */
138 kDtGpioPeriphIoGpio19 = 19, /**< */
139 kDtGpioPeriphIoGpio20 = 20, /**< */
140 kDtGpioPeriphIoGpio21 = 21, /**< */
141 kDtGpioPeriphIoGpio22 = 22, /**< */
142 kDtGpioPeriphIoGpio23 = 23, /**< */
143 kDtGpioPeriphIoGpio24 = 24, /**< */
144 kDtGpioPeriphIoGpio25 = 25, /**< */
145 kDtGpioPeriphIoGpio26 = 26, /**< */
146 kDtGpioPeriphIoGpio27 = 27, /**< */
147 kDtGpioPeriphIoGpio28 = 28, /**< */
148 kDtGpioPeriphIoGpio29 = 29, /**< */
149 kDtGpioPeriphIoGpio30 = 30, /**< */
150 kDtGpioPeriphIoGpio31 = 31, /**< */
151 kDtGpioPeriphIoCount = 32, /**< \internal Number of peripheral I/O */
152} dt_gpio_periph_io_t;
153
154/**
155 * List of supported hardware features.
156 */
157#define OPENTITAN_GPIO_HAS_IN_INTR_CTRL 1
158#define OPENTITAN_GPIO_HAS_IN_FILTER 1
159#define OPENTITAN_GPIO_HAS_OUT_MASK 1
160
161
162
163/**
164 * Get the gpio instance from an instance ID
165 *
166 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
167 *
168 * @param inst_id Instance ID.
169 * @return A gpio instance.
170 *
171 * **Note:** This function only makes sense if the instance ID has device type gpio,
172 * otherwise the returned value is unspecified.
173 */
174dt_gpio_t dt_gpio_from_instance_id(dt_instance_id_t inst_id);
175
176/**
177 * Get the instance ID of an instance.
178 *
179 * @param dt Instance of gpio.
180 * @return The instance ID of that instance.
181 */
182dt_instance_id_t dt_gpio_instance_id(dt_gpio_t dt);
183
184/**
185 * Get the register base address of an instance.
186 *
187 * @param dt Instance of gpio.
188 * @param reg_block The register block requested.
189 * @return The register base address of the requested block.
190 */
191uint32_t dt_gpio_reg_block(
192 dt_gpio_t dt,
193 dt_gpio_reg_block_t reg_block);
194
195/**
196 * Get the primary register base address of an instance.
197 *
198 * This is just a convenience function, equivalent to
199 * `dt_gpio_reg_block(dt, kDtGpioRegBlockCore)`
200 *
201 * @param dt Instance of gpio.
202 * @return The register base address of the primary register block.
203 */
204static inline uint32_t dt_gpio_primary_reg_block(
205 dt_gpio_t dt) {
206 return dt_gpio_reg_block(dt, kDtGpioRegBlockCore);
207}
208
209/**
210 * Get the PLIC ID of a gpio IRQ for a given instance.
211 *
212 * If the instance is not connected to the PLIC, this function
213 * will return `kDtPlicIrqIdNone`.
214 *
215 * @param dt Instance of gpio.
216 * @param irq A gpio IRQ.
217 * @return The PLIC ID of the IRQ of this instance.
218 */
219dt_plic_irq_id_t dt_gpio_irq_to_plic_id(
220 dt_gpio_t dt,
221 dt_gpio_irq_t irq);
222
223/**
224 * Convert a global IRQ ID to a local gpio IRQ type.
225 *
226 * @param dt Instance of gpio.
227 * @param irq A PLIC ID that belongs to this instance.
228 * @return The gpio IRQ, or `kDtGpioIrqCount`.
229 *
230 * **Note:** This function assumes that the PLIC ID belongs to the instance
231 * of gpio passed in parameter. In other words, it must be the case that
232 * `dt_gpio_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
233 * will return `kDtGpioIrqCount`.
234 */
235dt_gpio_irq_t dt_gpio_irq_from_plic_id(
236 dt_gpio_t dt,
237 dt_plic_irq_id_t irq);
238
239
240/**
241 * Get the alert ID of a gpio alert for a given instance.
242 *
243 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
244 * instances where the instance is not connected, the return value is unspecified.
245 *
246 * @param dt Instance of gpio.
247 * @param alert A gpio alert.
248 * @return The Alert Handler alert ID of the alert of this instance.
249 */
250dt_alert_id_t dt_gpio_alert_to_alert_id(
251 dt_gpio_t dt,
252 dt_gpio_alert_t alert);
253
254/**
255 * Convert a global alert ID to a local gpio alert type.
256 *
257 * @param dt Instance of gpio.
258 * @param alert A global alert ID that belongs to this instance.
259 * @return The gpio alert, or `kDtGpioAlertCount`.
260 *
261 * **Note:** This function assumes that the global alert ID belongs to the
262 * instance of gpio passed in parameter. In other words, it must be the case
263 * that `dt_gpio_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
264 * this function will return `kDtGpioAlertCount`.
265 */
266dt_gpio_alert_t dt_gpio_alert_from_alert_id(
267 dt_gpio_t dt,
268 dt_alert_id_t alert);
269
270
271/**
272 * Get the peripheral I/O description of an instance.
273 *
274 * @param dt Instance of gpio.
275 * @param sig Requested peripheral I/O.
276 * @return Description of the requested peripheral I/O for this instance.
277 */
278dt_periph_io_t dt_gpio_periph_io(
279 dt_gpio_t dt,
280 dt_gpio_periph_io_t sig);
281
282/**
283 * Get the clock signal connected to a clock port of an instance.
284 *
285 * @param dt Instance of gpio.
286 * @param clk Clock port.
287 * @return Clock signal.
288 */
289dt_clock_t dt_gpio_clock(
290 dt_gpio_t dt,
291 dt_gpio_clock_t clk);
292
293/**
294 * Get the reset signal connected to a reset port of an instance.
295 *
296 * @param dt Instance of gpio.
297 * @param rst Reset port.
298 * @return Reset signal.
299 */
300dt_reset_t dt_gpio_reset(
301 dt_gpio_t dt,
302 dt_gpio_reset_t rst);
303
304
305
306/**
307 * Get the number of input period counters.
308 *
309 * @param dt Instance of gpio.
310 * @return number of input period counters.
311 */
312uint8_t dt_gpio_input_period_counter_count(dt_gpio_t dt);
313
314
315
316#endif // OPENTITAN_DT_GPIO_H_