76The underlying error bits in the !!FAULT_STATUS register remain set until reset, meaning the alert keeps firing.
77This doesn't hold for !!FAULT_STATUS.PHY_RELBL_ERR and !!FAULT_STATUS.PHY_STORAGE_ERR.
78To enable firmware dealing with multi-bit ECC and ICV errors during firmware selection and verification, these error bits can be cleared.
79After passing this stage, it is recommended that firmware classifies the corresponding alert as fatal on the receiver end, i.e, inside the alert handler. */
80kDtFlashCtrlAlertFatalPrimFlashAlert = 3, /**< Fatal alert triggered inside the flash primitive, including fatal TL-UL bus integrity faults of the test interface. */