Software APIs
dt_flash_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_FLASH_CTRL_H_
8#define OPENTITAN_DT_FLASH_CTRL_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP flash_ctrl and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the flash_ctrl.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_flash_ctrl {
24 kDtFlashCtrl = 0, /**< flash_ctrl */
25 kDtFlashCtrlFirst = 0, /**< \internal First instance */
26 kDtFlashCtrlCount = 1, /**< \internal Number of instances */
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
35 kDtFlashCtrlRegBlockCore = 0, /**< */
36 kDtFlashCtrlRegBlockPrim = 1, /**< */
37 kDtFlashCtrlRegBlockMem = 2, /**< */
38 kDtFlashCtrlRegBlockCount = 3, /**< \internal Number of register blocks */
40
41/** Primary register block (associated with the "primary" set of registers that control the IP). */
42static const dt_flash_ctrl_reg_block_t kDtFlashCtrlRegBlockPrimary = kDtFlashCtrlRegBlockCore;
43
44/**
45 * List of IRQs.
46 *
47 * IRQs are guaranteed to be numbered consecutively from 0.
48 */
49typedef enum dt_flash_ctrl_irq {
50 kDtFlashCtrlIrqProgEmpty = 0, /**< Program FIFO empty */
51 kDtFlashCtrlIrqProgLvl = 1, /**< Program FIFO drained to level */
52 kDtFlashCtrlIrqRdFull = 2, /**< Read FIFO full */
53 kDtFlashCtrlIrqRdLvl = 3, /**< Read FIFO filled to level */
54 kDtFlashCtrlIrqOpDone = 4, /**< Operation complete */
55 kDtFlashCtrlIrqCorrErr = 5, /**< Correctable error encountered */
56 kDtFlashCtrlIrqCount = 6, /**< \internal Number of IRQs */
58
59/**
60 * List of Alerts.
61 *
62 * Alerts are guaranteed to be numbered consecutively from 0.
63 */
64typedef enum dt_flash_ctrl_alert {
65 kDtFlashCtrlAlertRecovErr = 0, /**< flash recoverable errors */
66 kDtFlashCtrlAlertFatalStdErr = 1, /**< flash standard fatal errors */
67 kDtFlashCtrlAlertFatalErr = 2, /**< Flash fatal errors including uncorrectable ECC errors.
68
69Note that this alert is not always fatal.
70The underlying error bits in the !!FAULT_STATUS register remain set until reset, meaning the alert keeps firing.
71This doesn't hold for !!FAULT_STATUS.PHY_RELBL_ERR and !!FAULT_STATUS.PHY_STORAGE_ERR.
72To enable firmware dealing with multi-bit ECC and ICV errors during firmware selection and verification, these error bits can be cleared.
73After passing this stage, it is recommended that firmware classifies the corresponding alert as fatal on the receiver end, i.e, inside the alert handler. */
74 kDtFlashCtrlAlertFatalPrimFlashAlert = 3, /**< Fatal alert triggered inside the flash primitive, including fatal TL-UL bus integrity faults of the test interface. */
75 kDtFlashCtrlAlertRecovPrimFlashAlert = 4, /**< Recoverable alert triggered inside the flash primitive. */
76 kDtFlashCtrlAlertCount = 5, /**< \internal Number of Alerts */
78
79/**
80 * List of clock ports.
81 *
82 * Clock ports are guaranteed to be numbered consecutively from 0.
83 */
84typedef enum dt_flash_ctrl_clock {
85 kDtFlashCtrlClockClk = 0, /**< Clock port clk_i */
86 kDtFlashCtrlClockOtp = 1, /**< Clock port clk_otp_i */
87 kDtFlashCtrlClockCount = 2, /**< \internal Number of clock ports */
89
90/**
91 * List of reset ports.
92 *
93 * Reset ports are guaranteed to be numbered consecutively from 0.
94 */
95typedef enum dt_flash_ctrl_reset {
96 kDtFlashCtrlResetRst = 0, /**< Reset port rst_ni */
97 kDtFlashCtrlResetOtp = 1, /**< Reset port rst_otp_ni */
98 kDtFlashCtrlResetCount = 2, /**< \internal Number of reset ports */
100
101/**
102 * List of peripheral I/O.
103 *
104 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
105 */
107 kDtFlashCtrlPeriphIoTck = 0, /**< */
108 kDtFlashCtrlPeriphIoTms = 1, /**< */
109 kDtFlashCtrlPeriphIoTdi = 2, /**< */
110 kDtFlashCtrlPeriphIoTdo = 3, /**< */
111 kDtFlashCtrlPeriphIoCount = 4, /**< \internal Number of peripheral I/O */
113
114/**
115 * List of supported hardware features.
116 */
117#define OPENTITAN_FLASH_CTRL_HAS_ESCALATION 1
118#define OPENTITAN_FLASH_CTRL_HAS_FETCH_CODE 1
119#define OPENTITAN_FLASH_CTRL_HAS_INFO_CREATOR_PARTITION 1
120#define OPENTITAN_FLASH_CTRL_HAS_INFO_ISOLATED_PARTITION 1
121#define OPENTITAN_FLASH_CTRL_HAS_INFO_OWNER_PARTITION 1
122#define OPENTITAN_FLASH_CTRL_HAS_INIT_ROOT_SEEDS 1
123#define OPENTITAN_FLASH_CTRL_HAS_INIT_SCRAMBLING_KEYS 1
124#define OPENTITAN_FLASH_CTRL_HAS_MEM_PROTECTION 1
125#define OPENTITAN_FLASH_CTRL_HAS_OP_HOST_READ 1
126#define OPENTITAN_FLASH_CTRL_HAS_OP_PROTOCOL_CTRL 1
127#define OPENTITAN_FLASH_CTRL_HAS_RMA 1
128
129
130
131/**
132 * Get the flash_ctrl instance from an instance ID
133 *
134 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
135 *
136 * @param inst_id Instance ID.
137 * @return A flash_ctrl instance.
138 *
139 * **Note:** This function only makes sense if the instance ID has device type flash_ctrl,
140 * otherwise the returned value is unspecified.
141 */
143
144/**
145 * Get the instance ID of an instance.
146 *
147 * @param dt Instance of flash_ctrl.
148 * @return The instance ID of that instance.
149 */
151
152/**
153 * Get the register base address of an instance.
154 *
155 * @param dt Instance of flash_ctrl.
156 * @param reg_block The register block requested.
157 * @return The register base address of the requested block.
158 */
161 dt_flash_ctrl_reg_block_t reg_block);
162
163/**
164 * Get the primary register base address of an instance.
165 *
166 * This is just a convenience function, equivalent to
167 * `dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore)`
168 *
169 * @param dt Instance of flash_ctrl.
170 * @return The register base address of the primary register block.
171 */
172static inline uint32_t dt_flash_ctrl_primary_reg_block(
173 dt_flash_ctrl_t dt) {
174 return dt_flash_ctrl_reg_block(dt, kDtFlashCtrlRegBlockCore);
175}
176
177/**
178 * Get the PLIC ID of a flash_ctrl IRQ for a given instance.
179 *
180 * If the instance is not connected to the PLIC, this function
181 * will return `kDtPlicIrqIdNone`.
182 *
183 * @param dt Instance of flash_ctrl.
184 * @param irq A flash_ctrl IRQ.
185 * @return The PLIC ID of the IRQ of this instance.
186 */
190
191/**
192 * Convert a global IRQ ID to a local flash_ctrl IRQ type.
193 *
194 * @param dt Instance of flash_ctrl.
195 * @param irq A PLIC ID that belongs to this instance.
196 * @return The flash_ctrl IRQ, or `kDtFlashCtrlIrqCount`.
197 *
198 * **Note:** This function assumes that the PLIC ID belongs to the instance
199 * of flash_ctrl passed in parameter. In other words, it must be the case that
200 * `dt_flash_ctrl_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
201 * will return `kDtFlashCtrlIrqCount`.
202 */
205 dt_plic_irq_id_t irq);
206
207
208/**
209 * Get the alert ID of a flash_ctrl alert for a given instance.
210 *
211 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
212 * instances where the instance is not connected, the return value is unspecified.
213 *
214 * @param dt Instance of flash_ctrl.
215 * @param alert A flash_ctrl alert.
216 * @return The Alert Handler alert ID of the alert of this instance.
217 */
221
222/**
223 * Convert a global alert ID to a local flash_ctrl alert type.
224 *
225 * @param dt Instance of flash_ctrl.
226 * @param alert A global alert ID that belongs to this instance.
227 * @return The flash_ctrl alert, or `kDtFlashCtrlAlertCount`.
228 *
229 * **Note:** This function assumes that the global alert ID belongs to the
230 * instance of flash_ctrl passed in parameter. In other words, it must be the case
231 * that `dt_flash_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
232 * this function will return `kDtFlashCtrlAlertCount`.
233 */
236 dt_alert_id_t alert);
237
238
239/**
240 * Get the peripheral I/O description of an instance.
241 *
242 * @param dt Instance of flash_ctrl.
243 * @param sig Requested peripheral I/O.
244 * @return Description of the requested peripheral I/O for this instance.
245 */
249
250/**
251 * Get the clock signal connected to a clock port of an instance.
252 *
253 * @param dt Instance of flash_ctrl.
254 * @param clk Clock port.
255 * @return Clock signal.
256 */
260
261/**
262 * Get the reset signal connected to a reset port of an instance.
263 *
264 * @param dt Instance of flash_ctrl.
265 * @param rst Reset port.
266 * @return Reset signal.
267 */
271
272
273
274#endif // OPENTITAN_DT_FLASH_CTRL_H_