Software APIs
dt_csrng.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_CSRNG_H_
8#define OPENTITAN_DT_CSRNG_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP csrng and top earlgrey.
17 *
18 * This file contains the type definitions and global functions of the csrng.
19 */
20
21#include "hw/top/dt/dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_csrng {
30 kDtCsrng = 0, /**< csrng */
31 kDtCsrngFirst = 0, /**< \internal First instance */
32 kDtCsrngCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
40typedef enum dt_csrng_reg_block {
41 kDtCsrngRegBlockCore = 0, /**< */
42 kDtCsrngRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/**
46 * List of memories.
47 *
48 * Memories are guaranteed to start at 0 and to be consecutively numbered.
49 */
50typedef enum dt_csrng_memory {
51 kDtCsrngMemoryCount = 0, /**< \internal Number of memories */
53
54/** Primary register block (associated with the "primary" set of registers that control the IP). */
55static const dt_csrng_reg_block_t kDtCsrngRegBlockPrimary = kDtCsrngRegBlockCore;
56
57/**
58 * List of IRQs.
59 *
60 * IRQs are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_csrng_irq {
63 kDtCsrngIrqCsCmdReqDone = 0, /**< Asserted when a command request is completed. */
64 kDtCsrngIrqCsEntropyReq = 1, /**< Asserted when a request for entropy has been made. */
65 kDtCsrngIrqCsHwInstExc = 2, /**< Asserted when a hardware-attached CSRNG instance encounters a command exception */
66 kDtCsrngIrqCsFatalErr = 3, /**< Asserted when a FIFO error or a fatal alert occurs. Check the !!ERR_CODE register to get more information. */
67 kDtCsrngIrqCount = 4, /**< \internal Number of IRQs */
69
70/**
71 * List of Alerts.
72 *
73 * Alerts are guaranteed to be numbered consecutively from 0.
74 */
75typedef enum dt_csrng_alert {
76 kDtCsrngAlertRecovAlert = 0, /**< This alert is triggered when a recoverable alert occurs. Check the !!RECOV_ALERT_STS register to get more information. */
77 kDtCsrngAlertFatalAlert = 1, /**< This alert triggers (i) if an illegal state machine state is reached, or
78(ii) if an AES fatal alert condition occurs, or (iii) if a fatal integrity
79failure is detected on the TL-UL bus. */
80 kDtCsrngAlertCount = 2, /**< \internal Number of Alerts */
82
83/**
84 * List of clock ports.
85 *
86 * Clock ports are guaranteed to be numbered consecutively from 0.
87 */
88typedef enum dt_csrng_clock {
89 kDtCsrngClockClk = 0, /**< Clock port clk_i */
90 kDtCsrngClockCount = 1, /**< \internal Number of clock ports */
92
93/**
94 * List of reset ports.
95 *
96 * Reset ports are guaranteed to be numbered consecutively from 0.
97 */
98typedef enum dt_csrng_reset {
99 kDtCsrngResetRst = 0, /**< Reset port rst_ni */
100 kDtCsrngResetCount = 1, /**< \internal Number of reset ports */
102
103/**
104 * List of supported hardware features.
105 */
106#define OPENTITAN_CSRNG_HAS_INTERFACE_SOFTWARE 1
107#define OPENTITAN_CSRNG_HAS_INTERFACE_HARDWARE0 1
108#define OPENTITAN_CSRNG_HAS_INTERFACE_HARDWARE1 1
109#define OPENTITAN_CSRNG_HAS_MODE_DETERMINISTIC 1
110#define OPENTITAN_CSRNG_HAS_MODE_NONDETERMINISTIC 1
111#define OPENTITAN_CSRNG_HAS_READ_INT_STATE 1
112#define OPENTITAN_CSRNG_HAS_LIFECYCLE_DEBUGENABLE 1
113
114
115
116/**
117 * Get the csrng instance from an instance ID
118 *
119 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
120 *
121 * @param inst_id Instance ID.
122 * @return A csrng instance.
123 *
124 * **Note:** This function only makes sense if the instance ID has device type csrng,
125 * otherwise the returned value is unspecified.
126 */
128
129/**
130 * Get the instance ID of an instance.
131 *
132 * @param dt Instance of csrng.
133 * @return The instance ID of that instance.
134 */
136
137/**
138 * Get the register base address of an instance.
139 *
140 * @param dt Instance of csrng.
141 * @param reg_block The register block requested.
142 * @return The register base address of the requested block.
143 */
144uint32_t dt_csrng_reg_block(
145 dt_csrng_t dt,
146 dt_csrng_reg_block_t reg_block);
147
148/**
149 * Get the primary register base address of an instance.
150 *
151 * This is just a convenience function, equivalent to
152 * `dt_csrng_reg_block(dt, kDtCsrngRegBlockCore)`
153 *
154 * @param dt Instance of csrng.
155 * @return The register base address of the primary register block.
156 */
157static inline uint32_t dt_csrng_primary_reg_block(
158 dt_csrng_t dt) {
159 return dt_csrng_reg_block(dt, kDtCsrngRegBlockCore);
160}
161
162/**
163 * Get the base address of a memory.
164 *
165 * @param dt Instance of csrng.
166 * @param mem The memory requested.
167 * @return The base address of the requested memory.
168 */
169uint32_t dt_csrng_memory_base(
170 dt_csrng_t dt,
172
173/**
174 * Get the size of a memory.
175 *
176 * @param dt Instance of csrng.
177 * @param mem The memory requested.
178 * @return The size of the requested memory.
179 */
180uint32_t dt_csrng_memory_size(
181 dt_csrng_t dt,
183
184/**
185 * Get the PLIC ID of a csrng IRQ for a given instance.
186 *
187 * If the instance is not connected to the PLIC, this function
188 * will return `kDtPlicIrqIdNone`.
189 *
190 * @param dt Instance of csrng.
191 * @param irq A csrng IRQ.
192 * @return The PLIC ID of the IRQ of this instance.
193 */
195 dt_csrng_t dt,
196 dt_csrng_irq_t irq);
197
198/**
199 * Convert a global IRQ ID to a local csrng IRQ type.
200 *
201 * @param dt Instance of csrng.
202 * @param irq A PLIC ID that belongs to this instance.
203 * @return The csrng IRQ, or `kDtCsrngIrqCount`.
204 *
205 * **Note:** This function assumes that the PLIC ID belongs to the instance
206 * of csrng passed in parameter. In other words, it must be the case that
207 * `dt_csrng_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
208 * will return `kDtCsrngIrqCount`.
209 */
211 dt_csrng_t dt,
212 dt_plic_irq_id_t irq);
213
214
215/**
216 * Get the alert ID of a csrng alert for a given instance.
217 *
218 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
219 * instances where the instance is not connected, the return value is unspecified.
220 *
221 * @param dt Instance of csrng.
222 * @param alert A csrng alert.
223 * @return The Alert Handler alert ID of the alert of this instance.
224 */
226 dt_csrng_t dt,
227 dt_csrng_alert_t alert);
228
229/**
230 * Convert a global alert ID to a local csrng alert type.
231 *
232 * @param dt Instance of csrng.
233 * @param alert A global alert ID that belongs to this instance.
234 * @return The csrng alert, or `kDtCsrngAlertCount`.
235 *
236 * **Note:** This function assumes that the global alert ID belongs to the
237 * instance of csrng passed in parameter. In other words, it must be the case
238 * that `dt_csrng_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
239 * this function will return `kDtCsrngAlertCount`.
240 */
242 dt_csrng_t dt,
243 dt_alert_id_t alert);
244
245
246
247/**
248 * Get the clock signal connected to a clock port of an instance.
249 *
250 * @param dt Instance of csrng.
251 * @param clk Clock port.
252 * @return Clock signal.
253 */
255 dt_csrng_t dt,
256 dt_csrng_clock_t clk);
257
258/**
259 * Get the reset signal connected to a reset port of an instance.
260 *
261 * @param dt Instance of csrng.
262 * @param rst Reset port.
263 * @return Reset signal.
264 */
266 dt_csrng_t dt,
267 dt_csrng_reset_t rst);
268
269
270
271#ifdef __cplusplus
272} // extern "C"
273#endif // __cplusplus
274
275#endif // OPENTITAN_DT_CSRNG_H_