Software APIs
dt_clkmgr.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_CLKMGR_H_
8#define OPENTITAN_DT_CLKMGR_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP clkmgr and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the clkmgr.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
22
23
24/**
25 * List of instances.
26 */
27typedef enum dt_clkmgr {
28 kDtClkmgrAon = 0, /**< clkmgr_aon */
29 kDtClkmgrFirst = 0, /**< \internal First instance */
30 kDtClkmgrCount = 1, /**< \internal Number of instances */
32
33/**
34 * List of register blocks.
35 *
36 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
37 */
38typedef enum dt_clkmgr_reg_block {
39 kDtClkmgrRegBlockCore = 0, /**< */
40 kDtClkmgrRegBlockCount = 1, /**< \internal Number of register blocks */
42
43/** Primary register block (associated with the "primary" set of registers that control the IP). */
44static const dt_clkmgr_reg_block_t kDtClkmgrRegBlockPrimary = kDtClkmgrRegBlockCore;
45
46/**
47 * List of Alerts.
48 *
49 * Alerts are guaranteed to be numbered consecutively from 0.
50 */
51typedef enum dt_clkmgr_alert {
52 kDtClkmgrAlertRecovFault = 0, /**< This recoverable alert is triggered when there are measurement errors. */
53 kDtClkmgrAlertFatalFault = 1, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
54 kDtClkmgrAlertCount = 2, /**< \internal Number of Alerts */
56
57/**
58 * List of clock ports.
59 *
60 * Clock ports are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_clkmgr_clock {
63 kDtClkmgrClockClk = 0, /**< Clock port clk_i */
64 kDtClkmgrClockMain = 1, /**< Clock port clk_main_i */
65 kDtClkmgrClockIo = 2, /**< Clock port clk_io_i */
66 kDtClkmgrClockUsb = 3, /**< Clock port clk_usb_i */
67 kDtClkmgrClockAon = 4, /**< Clock port clk_aon_i */
68 kDtClkmgrClockCount = 5, /**< \internal Number of clock ports */
70
71/**
72 * List of reset ports.
73 *
74 * Reset ports are guaranteed to be numbered consecutively from 0.
75 */
76typedef enum dt_clkmgr_reset {
77 kDtClkmgrResetRst = 0, /**< Reset port rst_ni */
78 kDtClkmgrResetRoot = 1, /**< Reset port rst_root_ni */
79 kDtClkmgrResetMain = 2, /**< Reset port rst_main_ni */
80 kDtClkmgrResetIo = 3, /**< Reset port rst_io_ni */
81 kDtClkmgrResetUsb = 4, /**< Reset port rst_usb_ni */
82 kDtClkmgrResetAon = 5, /**< Reset port rst_aon_ni */
83 kDtClkmgrResetIoDiv2 = 6, /**< Reset port rst_io_div2_ni */
84 kDtClkmgrResetIoDiv4 = 7, /**< Reset port rst_io_div4_ni */
85 kDtClkmgrResetRootMain = 8, /**< Reset port rst_root_main_ni */
86 kDtClkmgrResetRootIo = 9, /**< Reset port rst_root_io_ni */
87 kDtClkmgrResetRootIoDiv2 = 10, /**< Reset port rst_root_io_div2_ni */
88 kDtClkmgrResetRootIoDiv4 = 11, /**< Reset port rst_root_io_div4_ni */
89 kDtClkmgrResetRootUsb = 12, /**< Reset port rst_root_usb_ni */
90 kDtClkmgrResetCount = 13, /**< \internal Number of reset ports */
92
93/**
94 * List of supported hardware features.
95 */
96#define OPENTITAN_CLKMGR_HAS_ENABLE_IO_DIV4 1
97#define OPENTITAN_CLKMGR_HAS_ENABLE_IO_DIV2 1
98#define OPENTITAN_CLKMGR_HAS_ENABLE_IO 1
99#define OPENTITAN_CLKMGR_HAS_ENABLE_USB 1
100#define OPENTITAN_CLKMGR_HAS_HINT_AES 1
101#define OPENTITAN_CLKMGR_HAS_HINT_HMAC 1
102#define OPENTITAN_CLKMGR_HAS_HINT_KMAC 1
103#define OPENTITAN_CLKMGR_HAS_HINT_OTBN 1
104#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_REGWEN 1
105#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_IO 1
106#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_IO_DIV2 1
107#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_IO_DIV4 1
108#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_MAIN 1
109#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_USB 1
110#define OPENTITAN_CLKMGR_HAS_MEAS_CTRL_RECOV_ERR 1
111#define OPENTITAN_CLKMGR_HAS_LC_EXTCLK_SPEED 1
112#define OPENTITAN_CLKMGR_HAS_SW_EXTCLK_REGWEN 1
113#define OPENTITAN_CLKMGR_HAS_SW_EXTCLK_HIGH_SPEED 1
114#define OPENTITAN_CLKMGR_HAS_SW_EXTCLK_LOW_SPEED 1
115#define OPENTITAN_CLKMGR_HAS_JITTER_REGWEN 1
116#define OPENTITAN_CLKMGR_HAS_JITTER_ENABLE 1
117#define OPENTITAN_CLKMGR_HAS_ALERT_HANDLER_CLOCK_STATUS 1
118
119
120
121/**
122 * Get the clkmgr instance from an instance ID
123 *
124 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
125 *
126 * @param inst_id Instance ID.
127 * @return A clkmgr instance.
128 *
129 * **Note:** This function only makes sense if the instance ID has device type clkmgr,
130 * otherwise the returned value is unspecified.
131 */
133
134/**
135 * Get the instance ID of an instance.
136 *
137 * @param dt Instance of clkmgr.
138 * @return The instance ID of that instance.
139 */
141
142/**
143 * Get the register base address of an instance.
144 *
145 * @param dt Instance of clkmgr.
146 * @param reg_block The register block requested.
147 * @return The register base address of the requested block.
148 */
149uint32_t dt_clkmgr_reg_block(
150 dt_clkmgr_t dt,
151 dt_clkmgr_reg_block_t reg_block);
152
153/**
154 * Get the primary register base address of an instance.
155 *
156 * This is just a convenience function, equivalent to
157 * `dt_clkmgr_reg_block(dt, kDtClkmgrRegBlockCore)`
158 *
159 * @param dt Instance of clkmgr.
160 * @return The register base address of the primary register block.
161 */
162static inline uint32_t dt_clkmgr_primary_reg_block(
163 dt_clkmgr_t dt) {
164 return dt_clkmgr_reg_block(dt, kDtClkmgrRegBlockCore);
165}
166
167
168/**
169 * Get the alert ID of a clkmgr alert for a given instance.
170 *
171 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
172 * instances where the instance is not connected, the return value is unspecified.
173 *
174 * @param dt Instance of clkmgr.
175 * @param alert A clkmgr alert.
176 * @return The Alert Handler alert ID of the alert of this instance.
177 */
179 dt_clkmgr_t dt,
180 dt_clkmgr_alert_t alert);
181
182/**
183 * Convert a global alert ID to a local clkmgr alert type.
184 *
185 * @param dt Instance of clkmgr.
186 * @param alert A global alert ID that belongs to this instance.
187 * @return The clkmgr alert, or `kDtClkmgrAlertCount`.
188 *
189 * **Note:** This function assumes that the global alert ID belongs to the
190 * instance of clkmgr passed in parameter. In other words, it must be the case
191 * that `dt_clkmgr_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
192 * this function will return `kDtClkmgrAlertCount`.
193 */
195 dt_clkmgr_t dt,
196 dt_alert_id_t alert);
197
198
199
200/**
201 * Get the clock signal connected to a clock port of an instance.
202 *
203 * @param dt Instance of clkmgr.
204 * @param clk Clock port.
205 * @return Clock signal.
206 */
208 dt_clkmgr_t dt,
210
211/**
212 * Get the reset signal connected to a reset port of an instance.
213 *
214 * @param dt Instance of clkmgr.
215 * @param rst Reset port.
216 * @return Reset signal.
217 */
219 dt_clkmgr_t dt,
221
222
223
224/**
225 * Get the number of software gateable clocks.
226 *
227 * @param dt Instance of clkmgr.
228 * @return Number of gateable clocks.
229 */
231
232/**
233 * Get the instance ID of a gateable clock.
234 *
235 * The clocks are ordered as they appear in the registers.
236 *
237 * @param dt Instance of clkmgr.
238 * @param idx Index of the gateable clock, between 0 and `dt_clkmgr_sw_clock_count(dt)-1`.
239 * @return Instance ID of the device whose clock is gateable.
240 */
242
243/**
244 * Get the number of software hintable clocks.
245 *
246 * @param dt Instance of clkmgr.
247 * @return Number of hintable clocks.
248 */
250
251/**
252 * Get the instance ID of a hintable clock.
253 *
254 * The clocks sources are ordered as they appear in the registers.
255 *
256 * @param dt Instance of clkmgr.
257 * @param idx Index of the hintable clock, between 0 and `dt_clkmgr_hint_clock_count(dt)-1`.
258 * @return Instance ID of the device whose clock is hintable.
259 */
261
262/**
263 * Description of a measurable clock.
264 *
265 */
267 dt_clock_t clock; /**< Clock */
268 uint32_t meas_ctrl_en_off; /**< MEAS_CTRL_EN register offset */
269 bitfield_field32_t meas_ctrl_en_en_field; /**< MEAS_CTRL_EN_EN bitfield */
270 uint32_t meas_ctrl_shadowed_off; /**< CTRL_SHADOWED register offset */
271 bitfield_field32_t meas_ctrl_shadowed_lo_field; /**< CTRL_SHADOWED_LO bitfield */
272 bitfield_field32_t meas_ctrl_shadowed_hi_field; /**< CTRL_SHADOWED_HI bitfield */
274
275
276/**
277 * Get the number of measurable clocks.
278 *
279 * @param dt Instance of clkmgr.
280 * @return Number of measurable clocks.
281 */
283
284/**
285 * Get the description of a measurable clock.
286 *
287 * @param dt Instance of clkmgr.
288 * @param idx Index of the measurable clock, between 0 and
289 * `dt_clkmgr_measurable_clock_count(dt)-1`.
290 * @return Description of the measurable clock.
291 */
293
294
295
296#endif // OPENTITAN_DT_CLKMGR_H_