Software APIs
dt_ast.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_AST_H_
8#define OPENTITAN_DT_AST_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP ast and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the ast.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20/**
21 * List of instances.
22 */
23typedef enum dt_ast {
24 kDtAst = 0, /**< ast */
25 kDtAstFirst = 0, /**< \internal First instance */
26 kDtAstCount = 1, /**< \internal Number of instances */
28
29/**
30 * List of register blocks.
31 *
32 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
33 */
34typedef enum dt_ast_reg_block {
35 kDtAstRegBlockCore = 0, /**< */
36 kDtAstRegBlockCount = 1, /**< \internal Number of register blocks */
38
39/** Primary register block (associated with the "primary" set of registers that control the IP). */
40static const dt_ast_reg_block_t kDtAstRegBlockPrimary = kDtAstRegBlockCore;
41
42/**
43 * List of clock ports.
44 *
45 * Clock ports are guaranteed to be numbered consecutively from 0.
46 */
47typedef enum dt_ast_clock {
48 kDtAstClockAstTlul = 0, /**< Clock port clk_ast_tlul_i */
49 kDtAstClockAstAdc = 1, /**< Clock port clk_ast_adc_i */
50 kDtAstClockAstAlert = 2, /**< Clock port clk_ast_alert_i */
51 kDtAstClockAstEs = 3, /**< Clock port clk_ast_es_i */
52 kDtAstClockAstRng = 4, /**< Clock port clk_ast_rng_i */
53 kDtAstClockAstUsb = 5, /**< Clock port clk_ast_usb_i */
54 kDtAstClockCount = 6, /**< \internal Number of clock ports */
56
57/**
58 * List of reset ports.
59 *
60 * Reset ports are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_ast_reset {
63 kDtAstResetAstTlul = 0, /**< Reset port rst_ast_tlul_ni */
64 kDtAstResetAstAdc = 1, /**< Reset port rst_ast_adc_ni */
65 kDtAstResetAstAlert = 2, /**< Reset port rst_ast_alert_ni */
66 kDtAstResetAstEs = 3, /**< Reset port rst_ast_es_ni */
67 kDtAstResetAstRng = 4, /**< Reset port rst_ast_rng_ni */
68 kDtAstResetAstUsb = 5, /**< Reset port rst_ast_usb_ni */
69 kDtAstResetCount = 6, /**< \internal Number of reset ports */
71
72
73/**
74 * Get the ast instance from an instance ID
75 *
76 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
77 *
78 * @param inst_id Instance ID.
79 * @return A ast instance.
80 *
81 * **Note:** This function only makes sense if the instance ID has device type ast,
82 * otherwise the returned value is unspecified.
83 */
85
86/**
87 * Get the instance ID of an instance.
88 *
89 * @param dt Instance of ast.
90 * @return The instance ID of that instance.
91 */
93
94/**
95 * Get the register base address of an instance.
96 *
97 * @param dt Instance of ast.
98 * @param reg_block The register block requested.
99 * @return The register base address of the requested block.
100 */
101uint32_t dt_ast_reg_block(
102 dt_ast_t dt,
103 dt_ast_reg_block_t reg_block);
104
105/**
106 * Get the primary register base address of an instance.
107 *
108 * This is just a convenience function, equivalent to
109 * `dt_ast_reg_block(dt, kDtAstRegBlockCore)`
110 *
111 * @param dt Instance of ast.
112 * @return The register base address of the primary register block.
113 */
114static inline uint32_t dt_ast_primary_reg_block(
115 dt_ast_t dt) {
116 return dt_ast_reg_block(dt, kDtAstRegBlockCore);
117}
118
119
120
121
122/**
123 * Get the clock signal connected to a clock port of an instance.
124 *
125 * @param dt Instance of ast.
126 * @param clk Clock port.
127 * @return Clock signal.
128 */
130 dt_ast_t dt,
131 dt_ast_clock_t clk);
132
133/**
134 * Get the reset signal connected to a reset port of an instance.
135 *
136 * @param dt Instance of ast.
137 * @param rst Reset port.
138 * @return Reset signal.
139 */
141 dt_ast_t dt,
142 dt_ast_reset_t rst);
143
144
145
146#endif // OPENTITAN_DT_AST_H_