Software APIs
dt_ast.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_AST_H_
8#define OPENTITAN_DT_AST_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) for IP ast and top earlgrey.
13 *
14 * This file contains the type definitions and global functions of the ast.
15 */
16
17#include "dt_api.h"
18#include <stdint.h>
19
20
21
22/**
23 * List of instances.
24 */
25typedef enum dt_ast {
26 kDtAst = 0, /**< ast */
27 kDtAstFirst = 0, /**< \internal First instance */
28 kDtAstCount = 1, /**< \internal Number of instances */
30
31/**
32 * List of register blocks.
33 *
34 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
35 */
36typedef enum dt_ast_reg_block {
37 kDtAstRegBlockCore = 0, /**< */
38 kDtAstRegBlockCount = 1, /**< \internal Number of register blocks */
40
41/** Primary register block (associated with the "primary" set of registers that control the IP). */
42static const dt_ast_reg_block_t kDtAstRegBlockPrimary = kDtAstRegBlockCore;
43
44/**
45 * List of clock ports.
46 *
47 * Clock ports are guaranteed to be numbered consecutively from 0.
48 */
49typedef enum dt_ast_clock {
50 kDtAstClockAstTlul = 0, /**< Clock port clk_ast_tlul_i */
51 kDtAstClockAstAdc = 1, /**< Clock port clk_ast_adc_i */
52 kDtAstClockAstAlert = 2, /**< Clock port clk_ast_alert_i */
53 kDtAstClockAstEs = 3, /**< Clock port clk_ast_es_i */
54 kDtAstClockAstRng = 4, /**< Clock port clk_ast_rng_i */
55 kDtAstClockAstUsb = 5, /**< Clock port clk_ast_usb_i */
56 kDtAstClockCount = 6, /**< \internal Number of clock ports */
58
59/**
60 * List of reset ports.
61 *
62 * Reset ports are guaranteed to be numbered consecutively from 0.
63 */
64typedef enum dt_ast_reset {
65 kDtAstResetAstTlul = 0, /**< Reset port rst_ast_tlul_ni */
66 kDtAstResetAstAdc = 1, /**< Reset port rst_ast_adc_ni */
67 kDtAstResetAstAlert = 2, /**< Reset port rst_ast_alert_ni */
68 kDtAstResetAstEs = 3, /**< Reset port rst_ast_es_ni */
69 kDtAstResetAstRng = 4, /**< Reset port rst_ast_rng_ni */
70 kDtAstResetAstUsb = 5, /**< Reset port rst_ast_usb_ni */
71 kDtAstResetCount = 6, /**< \internal Number of reset ports */
73
74
75/**
76 * Get the ast instance from an instance ID
77 *
78 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
79 *
80 * @param inst_id Instance ID.
81 * @return A ast instance.
82 *
83 * **Note:** This function only makes sense if the instance ID has device type ast,
84 * otherwise the returned value is unspecified.
85 */
87
88/**
89 * Get the instance ID of an instance.
90 *
91 * @param dt Instance of ast.
92 * @return The instance ID of that instance.
93 */
95
96/**
97 * Get the register base address of an instance.
98 *
99 * @param dt Instance of ast.
100 * @param reg_block The register block requested.
101 * @return The register base address of the requested block.
102 */
103uint32_t dt_ast_reg_block(
104 dt_ast_t dt,
105 dt_ast_reg_block_t reg_block);
106
107/**
108 * Get the primary register base address of an instance.
109 *
110 * This is just a convenience function, equivalent to
111 * `dt_ast_reg_block(dt, kDtAstRegBlockCore)`
112 *
113 * @param dt Instance of ast.
114 * @return The register base address of the primary register block.
115 */
116static inline uint32_t dt_ast_primary_reg_block(
117 dt_ast_t dt) {
118 return dt_ast_reg_block(dt, kDtAstRegBlockCore);
119}
120
121
122
123
124/**
125 * Get the clock signal connected to a clock port of an instance.
126 *
127 * @param dt Instance of ast.
128 * @param clk Clock port.
129 * @return Clock signal.
130 */
132 dt_ast_t dt,
133 dt_ast_clock_t clk);
134
135/**
136 * Get the reset signal connected to a reset port of an instance.
137 *
138 * @param dt Instance of ast.
139 * @param rst Reset port.
140 * @return Reset signal.
141 */
143 dt_ast_t dt,
144 dt_ast_reset_t rst);
145
146
147
148#endif // OPENTITAN_DT_AST_H_