Software APIs
dt_aes.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_AES_H_
8#define OPENTITAN_DT_AES_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP aes and top earlgrey.
17 *
18 * This file contains the type definitions and global functions of the aes.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_aes {
30 kDtAes = 0, /**< aes */
31 kDtAesFirst = 0, /**< \internal First instance */
32 kDtAesCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
40typedef enum dt_aes_reg_block {
41 kDtAesRegBlockCore = 0, /**< */
42 kDtAesRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/** Primary register block (associated with the "primary" set of registers that control the IP). */
46static const dt_aes_reg_block_t kDtAesRegBlockPrimary = kDtAesRegBlockCore;
47
48/**
49 * List of Alerts.
50 *
51 * Alerts are guaranteed to be numbered consecutively from 0.
52 */
53typedef enum dt_aes_alert {
54 kDtAesAlertRecovCtrlUpdateErr = 0, /**< This recoverable alert is triggered upon detecting an update error in the shadowed Control Register.
55The content of the Control Register is not modified (See Control Register).
56The AES unit can be recovered from such a condition by restarting the AES operation, i.e., by re-writing the Control Register.
57This should be monitored by the system. */
58 kDtAesAlertFatalFault = 1, /**< This fatal alert is triggered upon detecting a fatal fault inside the AES unit.
59Examples for such faults include
60i) storage errors in the shadowed Control Register,
61ii) any internal FSM entering an invalid state,
62iii) any sparsely encoded signal taking on an invalid value,
63iv) errors in the internal round counter,
64v) escalations triggered by the life cycle controller, and
65vi) fatal integrity failures on the TL-UL bus.
66The AES unit cannot recover from such an error and needs to be reset. */
67 kDtAesAlertCount = 2, /**< \internal Number of Alerts */
69
70/**
71 * List of clock ports.
72 *
73 * Clock ports are guaranteed to be numbered consecutively from 0.
74 */
75typedef enum dt_aes_clock {
76 kDtAesClockClk = 0, /**< Clock port clk_i */
77 kDtAesClockEdn = 1, /**< Clock port clk_edn_i */
78 kDtAesClockCount = 2, /**< \internal Number of clock ports */
80
81/**
82 * List of reset ports.
83 *
84 * Reset ports are guaranteed to be numbered consecutively from 0.
85 */
86typedef enum dt_aes_reset {
87 kDtAesResetRst = 0, /**< Reset port rst_ni */
88 kDtAesResetEdn = 1, /**< Reset port rst_edn_ni */
89 kDtAesResetCount = 2, /**< \internal Number of reset ports */
91
92/**
93 * List of supported hardware features.
94 */
95#define OPENTITAN_AES_HAS_KEY_LEN_128 1
96#define OPENTITAN_AES_HAS_KEY_LEN_192 1
97#define OPENTITAN_AES_HAS_KEY_LEN_256 1
98#define OPENTITAN_AES_HAS_MODE_ECB 1
99#define OPENTITAN_AES_HAS_MODE_CBC 1
100#define OPENTITAN_AES_HAS_MODE_CFB_128 1
101#define OPENTITAN_AES_HAS_MODE_OFB 1
102#define OPENTITAN_AES_HAS_MODE_CTR 1
103#define OPENTITAN_AES_HAS_KEY_SIDELOAD 1
104#define OPENTITAN_AES_HAS_CLEAR_DATA_OUT 1
105#define OPENTITAN_AES_HAS_CLEAR_KEY_IV_DATA_IN 1
106#define OPENTITAN_AES_HAS_PRNG_RESEED_RATE 1
107#define OPENTITAN_AES_HAS_PRNG_KEY_TOUCH_FORCES_RESEED 1
108#define OPENTITAN_AES_HAS_PRNG_FORCE_MASKS 1
109#define OPENTITAN_AES_HAS_MANUAL_OPERATION 1
110
111
112
113/**
114 * Get the aes instance from an instance ID
115 *
116 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
117 *
118 * @param inst_id Instance ID.
119 * @return A aes instance.
120 *
121 * **Note:** This function only makes sense if the instance ID has device type aes,
122 * otherwise the returned value is unspecified.
123 */
125
126/**
127 * Get the instance ID of an instance.
128 *
129 * @param dt Instance of aes.
130 * @return The instance ID of that instance.
131 */
133
134/**
135 * Get the register base address of an instance.
136 *
137 * @param dt Instance of aes.
138 * @param reg_block The register block requested.
139 * @return The register base address of the requested block.
140 */
141uint32_t dt_aes_reg_block(
142 dt_aes_t dt,
143 dt_aes_reg_block_t reg_block);
144
145/**
146 * Get the primary register base address of an instance.
147 *
148 * This is just a convenience function, equivalent to
149 * `dt_aes_reg_block(dt, kDtAesRegBlockCore)`
150 *
151 * @param dt Instance of aes.
152 * @return The register base address of the primary register block.
153 */
154static inline uint32_t dt_aes_primary_reg_block(
155 dt_aes_t dt) {
156 return dt_aes_reg_block(dt, kDtAesRegBlockCore);
157}
158
159
160/**
161 * Get the alert ID of a aes alert for a given instance.
162 *
163 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
164 * instances where the instance is not connected, the return value is unspecified.
165 *
166 * @param dt Instance of aes.
167 * @param alert A aes alert.
168 * @return The Alert Handler alert ID of the alert of this instance.
169 */
171 dt_aes_t dt,
172 dt_aes_alert_t alert);
173
174/**
175 * Convert a global alert ID to a local aes alert type.
176 *
177 * @param dt Instance of aes.
178 * @param alert A global alert ID that belongs to this instance.
179 * @return The aes alert, or `kDtAesAlertCount`.
180 *
181 * **Note:** This function assumes that the global alert ID belongs to the
182 * instance of aes passed in parameter. In other words, it must be the case
183 * that `dt_aes_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
184 * this function will return `kDtAesAlertCount`.
185 */
187 dt_aes_t dt,
188 dt_alert_id_t alert);
189
190
191
192/**
193 * Get the clock signal connected to a clock port of an instance.
194 *
195 * @param dt Instance of aes.
196 * @param clk Clock port.
197 * @return Clock signal.
198 */
200 dt_aes_t dt,
201 dt_aes_clock_t clk);
202
203/**
204 * Get the reset signal connected to a reset port of an instance.
205 *
206 * @param dt Instance of aes.
207 * @param rst Reset port.
208 * @return Reset signal.
209 */
211 dt_aes_t dt,
212 dt_aes_reset_t rst);
213
214
215
216#ifdef __cplusplus
217} // extern "C"
218#endif // __cplusplus
219
220#endif // OPENTITAN_DT_AES_H_