Software APIs
ast.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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#ifndef OPENTITAN_DT_AST_H_
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#define OPENTITAN_DT_AST_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
// __cplusplus
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/**
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* @file
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* @brief Device Tables (DT) for IP ast and top earlgrey.
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*
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* This file contains the type definitions and global functions of the ast.
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*/
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#include "hw/top/dt/api.h"
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#include <stdint.h>
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/**
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* List of instances.
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*/
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typedef
enum
dt_ast
{
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kDtAstFirst
= 0,
/**< First instance */
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kDtAst
= 0,
/**< ast */
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}
dt_ast_t
;
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enum
{
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kDtAstCount
= 1,
/**< Number of instances */
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};
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/**
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* List of register blocks.
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*
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* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_ast_reg_block
{
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kDtAstRegBlockCore = 0,
/**< */
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}
dt_ast_reg_block_t
;
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enum
{
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kDtAstRegBlockCount
= 1,
/**< Number of register blocks */
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};
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/** Primary register block (associated with the "primary" set of registers that control the IP). */
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static
const
dt_ast_reg_block_t
kDtAstRegBlockPrimary = kDtAstRegBlockCore;
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/**
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* List of clock ports.
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*
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* Clock ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_ast_clock
{
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kDtAstClockAstTlul
= 0,
/**< Clock port clk_ast_tlul_i */
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kDtAstClockAstAdc
= 1,
/**< Clock port clk_ast_adc_i */
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kDtAstClockAstAlert
= 2,
/**< Clock port clk_ast_alert_i */
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kDtAstClockAstEs
= 3,
/**< Clock port clk_ast_es_i */
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kDtAstClockAstRng
= 4,
/**< Clock port clk_ast_rng_i */
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kDtAstClockAstUsb
= 5,
/**< Clock port clk_ast_usb_i */
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}
dt_ast_clock_t
;
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enum
{
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kDtAstClockCount
= 6,
/**< Number of clock ports */
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};
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/**
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* List of reset ports.
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*
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* Reset ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_ast_reset
{
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kDtAstResetAstTlul
= 0,
/**< Reset port rst_ast_tlul_ni */
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kDtAstResetAstAdc
= 1,
/**< Reset port rst_ast_adc_ni */
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kDtAstResetAstAlert
= 2,
/**< Reset port rst_ast_alert_ni */
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kDtAstResetAstEs
= 3,
/**< Reset port rst_ast_es_ni */
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kDtAstResetAstRng
= 4,
/**< Reset port rst_ast_rng_ni */
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kDtAstResetAstUsb
= 5,
/**< Reset port rst_ast_usb_ni */
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}
dt_ast_reset_t
;
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enum
{
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kDtAstResetCount
= 6,
/**< Number of reset ports */
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};
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/**
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* Get the ast instance from an instance ID
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*
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* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
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*
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* @param inst_id Instance ID.
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* @return A ast instance.
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*
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* **Note:** This function only makes sense if the instance ID has device type ast,
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* otherwise the returned value is unspecified.
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*/
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dt_ast_t
dt_ast_from_instance_id
(
dt_instance_id_t
inst_id);
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/**
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* Get the instance ID of an instance.
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*
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* @param dt Instance of ast.
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* @return The instance ID of that instance.
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*/
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dt_instance_id_t
dt_ast_instance_id
(
dt_ast_t
dt);
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/**
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* Get the register base address of an instance.
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*
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* @param dt Instance of ast.
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* @param reg_block The register block requested.
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* @return The register base address of the requested block.
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*/
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uint32_t
dt_ast_reg_block
(
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dt_ast_t
dt,
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dt_ast_reg_block_t
reg_block);
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/**
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* Get the primary register base address of an instance.
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*
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* This is just a convenience function, equivalent to
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* `dt_ast_reg_block(dt, kDtAstRegBlockCore)`
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*
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* @param dt Instance of ast.
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* @return The register base address of the primary register block.
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*/
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static
inline
uint32_t dt_ast_primary_reg_block(
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dt_ast_t
dt) {
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return
dt_ast_reg_block
(dt, kDtAstRegBlockCore);
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}
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/**
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* Get the clock signal connected to a clock port of an instance.
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*
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* @param dt Instance of ast.
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* @param clk Clock port.
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* @return Clock signal.
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*/
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dt_clock_t
dt_ast_clock
(
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dt_ast_t
dt,
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dt_ast_clock_t
clk);
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/**
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* Get the reset signal connected to a reset port of an instance.
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*
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* @param dt Instance of ast.
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* @param rst Reset port.
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* @return Reset signal.
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*/
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dt_reset_t
dt_ast_reset
(
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dt_ast_t
dt,
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dt_ast_reset_t
rst);
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#ifdef __cplusplus
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}
// extern "C"
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#endif
// __cplusplus
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#endif
// OPENTITAN_DT_AST_H_
(earlgrey)
hw
top
dt
ast.h
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