Software APIs
kmac.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_KMAC_H_
8#define OPENTITAN_DT_KMAC_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP kmac and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the kmac.
19 */
20
21#include "hw/top/dt/api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_kmac {
30 kDtKmacFirst = 0, /**< First instance */
31 kDtKmac = 0, /**< kmac */
33
34enum {
35 kDtKmacCount = 1, /**< Number of instances */
36};
37
38
39/**
40 * List of register blocks.
41 *
42 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
43 */
44typedef enum dt_kmac_reg_block {
45 kDtKmacRegBlockCore = 0, /**< */
47
48enum {
49 kDtKmacRegBlockCount = 1, /**< Number of register blocks */
50};
51
52
53/** Primary register block (associated with the "primary" set of registers that control the IP). */
54static const dt_kmac_reg_block_t kDtKmacRegBlockPrimary = kDtKmacRegBlockCore;
55
56/**
57 * List of IRQs.
58 *
59 * IRQs are guaranteed to be numbered consecutively from 0.
60 */
61typedef enum dt_kmac_irq {
62 kDtKmacIrqKmacDone = 0, /**< KMAC/SHA3 absorbing has been completed */
63 kDtKmacIrqFifoEmpty = 1, /**< The message FIFO is empty.
64 This interrupt is raised only if the message FIFO is actually writable by software, i.e., if all of the following conditions are met:
65 i) The KMAC block is not exercised by a hardware application interface.
66 ii) The SHA3 block is in the Absorb state.
67 iii) Software has not yet written the Process command to finish the absorption process.
68 For the interrupt to be raised, the message FIFO must also have been full previously.
69 Otherwise, the hardware empties the FIFO faster than software can fill it and there is no point in interrupting the software to inform it about the message FIFO being empty. */
70 kDtKmacIrqKmacErr = 2, /**< KMAC/SHA3 error occurred. ERR_CODE register shows the details */
72
73enum {
74 kDtKmacIrqCount = 3, /**< Number of IRQs */
75};
76
77
78/**
79 * List of Alerts.
80 *
81 * Alerts are guaranteed to be numbered consecutively from 0.
82 */
83typedef enum dt_kmac_alert {
84 kDtKmacAlertRecovOperationErr = 0, /**< Alert for KMAC operation error. It occurs when the shadow registers have update errors. */
85 kDtKmacAlertFatalFaultErr = 1, /**< This fatal alert is triggered when a fatal error is detected inside the KMAC unit.
86 Examples for such faults include:
87 i) TL-UL bus integrity fault.
88 ii) Storage errors in the shadow registers.
89 iii) Errors in the message, round, or key counter.
90 iv) Any internal FSM entering an invalid state.
91 v) An error in the redundant lfsr.
92 vi) A SHA3 core error occurs when an app interface is active.
93 The KMAC unit cannot recover from such an error and needs to be reset. */
95
96enum {
97 kDtKmacAlertCount = 2, /**< Number of Alerts */
98};
99
100
101/**
102 * List of clock ports.
103 *
104 * Clock ports are guaranteed to be numbered consecutively from 0.
105 */
106typedef enum dt_kmac_clock {
107 kDtKmacClockClk = 0, /**< Clock port clk_i */
108 kDtKmacClockEdn = 1, /**< Clock port clk_edn_i */
110
111enum {
112 kDtKmacClockCount = 2, /**< Number of clock ports */
113};
114
115
116/**
117 * List of reset ports.
118 *
119 * Reset ports are guaranteed to be numbered consecutively from 0.
120 */
121typedef enum dt_kmac_reset {
122 kDtKmacResetRst = 0, /**< Reset port rst_ni */
123 kDtKmacResetEdn = 1, /**< Reset port rst_edn_ni */
125
126enum {
127 kDtKmacResetCount = 2, /**< Number of reset ports */
128};
129
130
131/**
132 * List of supported hardware features.
133 */
134#define OPENTITAN_KMAC_HAS_MODE_SHA3 1
135#define OPENTITAN_KMAC_HAS_MODE_SHAKE 1
136#define OPENTITAN_KMAC_HAS_MODE_CSHAKE 1
137#define OPENTITAN_KMAC_HAS_MODE_KMAC 1
138#define OPENTITAN_KMAC_HAS_MODE_XOF 1
139#define OPENTITAN_KMAC_HAS_ENDIANNESS_MESSAGE 1
140#define OPENTITAN_KMAC_HAS_ENDIANNESS_DIGEST 1
141#define OPENTITAN_KMAC_HAS_KEY_SIDELOAD 1
142#define OPENTITAN_KMAC_HAS_ENTROPY_MODES 1
143
144
145
146/**
147 * Get the kmac instance from an instance ID
148 *
149 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
150 *
151 * @param inst_id Instance ID.
152 * @return A kmac instance.
153 *
154 * **Note:** This function only makes sense if the instance ID has device type kmac,
155 * otherwise the returned value is unspecified.
156 */
158
159/**
160 * Get the instance ID of an instance.
161 *
162 * @param dt Instance of kmac.
163 * @return The instance ID of that instance.
164 */
166
167/**
168 * Get the register base address of an instance.
169 *
170 * @param dt Instance of kmac.
171 * @param reg_block The register block requested.
172 * @return The register base address of the requested block.
173 */
174uint32_t dt_kmac_reg_block(
175 dt_kmac_t dt,
176 dt_kmac_reg_block_t reg_block);
177
178/**
179 * Get the primary register base address of an instance.
180 *
181 * This is just a convenience function, equivalent to
182 * `dt_kmac_reg_block(dt, kDtKmacRegBlockCore)`
183 *
184 * @param dt Instance of kmac.
185 * @return The register base address of the primary register block.
186 */
187static inline uint32_t dt_kmac_primary_reg_block(
188 dt_kmac_t dt) {
189 return dt_kmac_reg_block(dt, kDtKmacRegBlockCore);
190}
191
192/**
193 * Get the PLIC ID of a kmac IRQ for a given instance.
194 *
195 * If the instance is not connected to the PLIC, this function
196 * will return `kDtPlicIrqIdNone`.
197 *
198 * @param dt Instance of kmac.
199 * @param irq A kmac IRQ.
200 * @return The PLIC ID of the IRQ of this instance.
201 */
203 dt_kmac_t dt,
204 dt_kmac_irq_t irq);
205
206/**
207 * Convert a global IRQ ID to a local kmac IRQ type.
208 *
209 * @param dt Instance of kmac.
210 * @param irq A PLIC ID that belongs to this instance.
211 * @return The kmac IRQ, or `kDtKmacIrqCount`.
212 *
213 * **Note:** This function assumes that the PLIC ID belongs to the instance
214 * of kmac passed in parameter. In other words, it must be the case that
215 * `dt_kmac_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
216 * will return `kDtKmacIrqCount`.
217 */
219 dt_kmac_t dt,
220 dt_plic_irq_id_t irq);
221
222
223/**
224 * Get the alert ID of a kmac alert for a given instance.
225 *
226 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
227 * instances where the instance is not connected, the return value is unspecified.
228 *
229 * @param dt Instance of kmac.
230 * @param alert A kmac alert.
231 * @return The Alert Handler alert ID of the alert of this instance.
232 */
234 dt_kmac_t dt,
235 dt_kmac_alert_t alert);
236
237/**
238 * Convert a global alert ID to a local kmac alert type.
239 *
240 * @param dt Instance of kmac.
241 * @param alert A global alert ID that belongs to this instance.
242 * @return The kmac alert, or `kDtKmacAlertCount`.
243 *
244 * **Note:** This function assumes that the global alert ID belongs to the
245 * instance of kmac passed in parameter. In other words, it must be the case
246 * that `dt_kmac_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
247 * this function will return `kDtKmacAlertCount`.
248 */
250 dt_kmac_t dt,
251 dt_alert_id_t alert);
252
253
254
255/**
256 * Get the clock signal connected to a clock port of an instance.
257 *
258 * @param dt Instance of kmac.
259 * @param clk Clock port.
260 * @return Clock signal.
261 */
263 dt_kmac_t dt,
264 dt_kmac_clock_t clk);
265
266/**
267 * Get the reset signal connected to a reset port of an instance.
268 *
269 * @param dt Instance of kmac.
270 * @param rst Reset port.
271 * @return Reset signal.
272 */
274 dt_kmac_t dt,
275 dt_kmac_reset_t rst);
276
277
278
279#ifdef __cplusplus
280} // extern "C"
281#endif // __cplusplus
282
283#endif // OPENTITAN_DT_KMAC_H_