Software APIs
dt_uart.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_UART_H_
8#define OPENTITAN_DT_UART_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP uart and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the uart.
19 */
20
21#include "hw/top/dt/dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_uart {
30 kDtUart0 = 0, /**< uart0 */
31 kDtUartFirst = 0, /**< \internal First instance */
32 kDtUartCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
40typedef enum dt_uart_reg_block {
41 kDtUartRegBlockCore = 0, /**< */
42 kDtUartRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/** Primary register block (associated with the "primary" set of registers that control the IP). */
46static const dt_uart_reg_block_t kDtUartRegBlockPrimary = kDtUartRegBlockCore;
47
48/**
49 * List of memories.
50 *
51 * Memories are guaranteed to start at 0 and to be consecutively numbered.
52 */
53typedef enum dt_uart_memory {
54 kDtUartMemoryCount = 0, /**< \internal Number of memories */
56
57/**
58 * List of IRQs.
59 *
60 * IRQs are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_uart_irq {
63 kDtUartIrqTxWatermark = 0, /**< raised if the transmit FIFO is past the high-water mark. */
64 kDtUartIrqRxWatermark = 1, /**< raised if the receive FIFO is past the high-water mark. */
65 kDtUartIrqTxDone = 2, /**< raised if the transmit FIFO has emptied and no transmit is ongoing. */
66 kDtUartIrqRxOverflow = 3, /**< raised if the receive FIFO has overflowed. */
67 kDtUartIrqRxFrameErr = 4, /**< raised if a framing error has been detected on receive. */
68 kDtUartIrqRxBreakErr = 5, /**< raised if break condition has been detected on receive. */
69 kDtUartIrqRxTimeout = 6, /**< raised if RX FIFO has characters remaining in the FIFO without being
70retrieved for the programmed time period. */
71 kDtUartIrqRxParityErr = 7, /**< raised if the receiver has detected a parity error. */
72 kDtUartIrqTxEmpty = 8, /**< raised if the transmit FIFO is empty. */
73 kDtUartIrqCount = 9, /**< \internal Number of IRQs */
75
76/**
77 * List of Alerts.
78 *
79 * Alerts are guaranteed to be numbered consecutively from 0.
80 */
81typedef enum dt_uart_alert {
82 kDtUartAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
83 kDtUartAlertCount = 1, /**< \internal Number of Alerts */
85
86/**
87 * List of clock ports.
88 *
89 * Clock ports are guaranteed to be numbered consecutively from 0.
90 */
91typedef enum dt_uart_clock {
92 kDtUartClockClk = 0, /**< Clock port clk_i */
93 kDtUartClockCount = 1, /**< \internal Number of clock ports */
95
96/**
97 * List of reset ports.
98 *
99 * Reset ports are guaranteed to be numbered consecutively from 0.
100 */
101typedef enum dt_uart_reset {
102 kDtUartResetRst = 0, /**< Reset port rst_ni */
103 kDtUartResetCount = 1, /**< \internal Number of reset ports */
105
106/**
107 * List of peripheral I/O.
108 *
109 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
110 */
111typedef enum dt_uart_periph_io {
112 kDtUartPeriphIoRx = 0, /**< */
113 kDtUartPeriphIoTx = 1, /**< */
114 kDtUartPeriphIoCount = 2, /**< \internal Number of peripheral I/O */
116
117/**
118 * List of supported hardware features.
119 */
120#define OPENTITAN_UART_HAS_PARITY 1
121#define OPENTITAN_UART_HAS_LINE_LOOPBACK 1
122#define OPENTITAN_UART_HAS_SYSTEM_LOOPBACK 1
123#define OPENTITAN_UART_HAS_BAUD_RATE_CONTROL 1
124#define OPENTITAN_UART_HAS_LINE_BREAK 1
125#define OPENTITAN_UART_HAS_FIFO_INTERRUPTS 1
126
127
128
129/**
130 * Get the uart instance from an instance ID
131 *
132 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
133 *
134 * @param inst_id Instance ID.
135 * @return A uart instance.
136 *
137 * **Note:** This function only makes sense if the instance ID has device type uart,
138 * otherwise the returned value is unspecified.
139 */
141
142/**
143 * Get the instance ID of an instance.
144 *
145 * @param dt Instance of uart.
146 * @return The instance ID of that instance.
147 */
149
150/**
151 * Get the register base address of an instance.
152 *
153 * @param dt Instance of uart.
154 * @param reg_block The register block requested.
155 * @return The register base address of the requested block.
156 */
157uint32_t dt_uart_reg_block(
158 dt_uart_t dt,
159 dt_uart_reg_block_t reg_block);
160
161/**
162 * Get the primary register base address of an instance.
163 *
164 * This is just a convenience function, equivalent to
165 * `dt_uart_reg_block(dt, kDtUartRegBlockCore)`
166 *
167 * @param dt Instance of uart.
168 * @return The register base address of the primary register block.
169 */
170static inline uint32_t dt_uart_primary_reg_block(
171 dt_uart_t dt) {
172 return dt_uart_reg_block(dt, kDtUartRegBlockCore);
173}
174
175/**
176 * Get the base address of a memory.
177 *
178 * @param dt Instance of uart.
179 * @param mem The memory requested.
180 * @return The base address of the requested memory.
181 */
182uint32_t dt_uart_memory_base(
183 dt_uart_t dt,
184 dt_uart_memory_t mem);
185
186/**
187 * Get the size of a memory.
188 *
189 * @param dt Instance of uart.
190 * @param mem The memory requested.
191 * @return The size of the requested memory.
192 */
193uint32_t dt_uart_memory_size(
194 dt_uart_t dt,
195 dt_uart_memory_t mem);
196
197/**
198 * Get the PLIC ID of a uart IRQ for a given instance.
199 *
200 * If the instance is not connected to the PLIC, this function
201 * will return `kDtPlicIrqIdNone`.
202 *
203 * @param dt Instance of uart.
204 * @param irq A uart IRQ.
205 * @return The PLIC ID of the IRQ of this instance.
206 */
208 dt_uart_t dt,
209 dt_uart_irq_t irq);
210
211/**
212 * Convert a global IRQ ID to a local uart IRQ type.
213 *
214 * @param dt Instance of uart.
215 * @param irq A PLIC ID that belongs to this instance.
216 * @return The uart IRQ, or `kDtUartIrqCount`.
217 *
218 * **Note:** This function assumes that the PLIC ID belongs to the instance
219 * of uart passed in parameter. In other words, it must be the case that
220 * `dt_uart_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
221 * will return `kDtUartIrqCount`.
222 */
224 dt_uart_t dt,
225 dt_plic_irq_id_t irq);
226
227
228/**
229 * Get the alert ID of a uart alert for a given instance.
230 *
231 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
232 * instances where the instance is not connected, the return value is unspecified.
233 *
234 * @param dt Instance of uart.
235 * @param alert A uart alert.
236 * @return The Alert Handler alert ID of the alert of this instance.
237 */
239 dt_uart_t dt,
240 dt_uart_alert_t alert);
241
242/**
243 * Convert a global alert ID to a local uart alert type.
244 *
245 * @param dt Instance of uart.
246 * @param alert A global alert ID that belongs to this instance.
247 * @return The uart alert, or `kDtUartAlertCount`.
248 *
249 * **Note:** This function assumes that the global alert ID belongs to the
250 * instance of uart passed in parameter. In other words, it must be the case
251 * that `dt_uart_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
252 * this function will return `kDtUartAlertCount`.
253 */
255 dt_uart_t dt,
256 dt_alert_id_t alert);
257
258
259/**
260 * Get the peripheral I/O description of an instance.
261 *
262 * @param dt Instance of uart.
263 * @param sig Requested peripheral I/O.
264 * @return Description of the requested peripheral I/O for this instance.
265 */
267 dt_uart_t dt,
269
270/**
271 * Get the clock signal connected to a clock port of an instance.
272 *
273 * @param dt Instance of uart.
274 * @param clk Clock port.
275 * @return Clock signal.
276 */
278 dt_uart_t dt,
279 dt_uart_clock_t clk);
280
281/**
282 * Get the reset signal connected to a reset port of an instance.
283 *
284 * @param dt Instance of uart.
285 * @param rst Reset port.
286 * @return Reset signal.
287 */
289 dt_uart_t dt,
290 dt_uart_reset_t rst);
291
292
293
294#ifdef __cplusplus
295} // extern "C"
296#endif // __cplusplus
297
298#endif // OPENTITAN_DT_UART_H_