Software APIs
dt_sram_ctrl.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_SRAM_CTRL_H_
8#define OPENTITAN_DT_SRAM_CTRL_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP sram_ctrl and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the sram_ctrl.
19 */
20
21#include "dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_sram_ctrl {
30 kDtSramCtrlRetAon = 0, /**< sram_ctrl_ret_aon */
31 kDtSramCtrlMain = 1, /**< sram_ctrl_main */
32 kDtSramCtrlMbox = 2, /**< sram_ctrl_mbox */
33 kDtSramCtrlFirst = 0, /**< \internal First instance */
34 kDtSramCtrlCount = 3, /**< \internal Number of instances */
36
37/**
38 * List of register blocks.
39 *
40 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
41 */
43 kDtSramCtrlRegBlockRegs = 0, /**< */
44 kDtSramCtrlRegBlockRam = 1, /**< */
45 kDtSramCtrlRegBlockCount = 2, /**< \internal Number of register blocks */
47
48/** Primary register block (associated with the "primary" set of registers that control the IP). */
49static const dt_sram_ctrl_reg_block_t kDtSramCtrlRegBlockPrimary = kDtSramCtrlRegBlockRegs;
50
51/**
52 * List of Alerts.
53 *
54 * Alerts are guaranteed to be numbered consecutively from 0.
55 */
56typedef enum dt_sram_ctrl_alert {
57 kDtSramCtrlAlertFatalError = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected,
58or if the initialization mechanism has reached an invalid state. */
59 kDtSramCtrlAlertCount = 1, /**< \internal Number of Alerts */
61
62/**
63 * List of clock ports.
64 *
65 * Clock ports are guaranteed to be numbered consecutively from 0.
66 */
67typedef enum dt_sram_ctrl_clock {
68 kDtSramCtrlClockClk = 0, /**< Clock port clk_i */
69 kDtSramCtrlClockOtp = 1, /**< Clock port clk_otp_i */
70 kDtSramCtrlClockCount = 2, /**< \internal Number of clock ports */
72
73/**
74 * List of reset ports.
75 *
76 * Reset ports are guaranteed to be numbered consecutively from 0.
77 */
78typedef enum dt_sram_ctrl_reset {
79 kDtSramCtrlResetRst = 0, /**< Reset port rst_ni */
80 kDtSramCtrlResetOtp = 1, /**< Reset port rst_otp_ni */
81 kDtSramCtrlResetCount = 2, /**< \internal Number of reset ports */
83
84/**
85 * List of supported hardware features.
86 */
87#define OPENTITAN_SRAM_CTRL_HAS_INTEGRITY 1
88#define OPENTITAN_SRAM_CTRL_HAS_SCRAMBLED 1
89#define OPENTITAN_SRAM_CTRL_HAS_LOCK_ON_ERROR 1
90#define OPENTITAN_SRAM_CTRL_HAS_MEMSET 1
91#define OPENTITAN_SRAM_CTRL_HAS_FETCH_ALLOW 1
92#define OPENTITAN_SRAM_CTRL_HAS_SUBWORD_ACCESS 1
93#define OPENTITAN_SRAM_CTRL_HAS_REGWEN 1
94
95
96
97/**
98 * Get the sram_ctrl instance from an instance ID
99 *
100 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
101 *
102 * @param inst_id Instance ID.
103 * @return A sram_ctrl instance.
104 *
105 * **Note:** This function only makes sense if the instance ID has device type sram_ctrl,
106 * otherwise the returned value is unspecified.
107 */
109
110/**
111 * Get the instance ID of an instance.
112 *
113 * @param dt Instance of sram_ctrl.
114 * @return The instance ID of that instance.
115 */
117
118/**
119 * Get the register base address of an instance.
120 *
121 * @param dt Instance of sram_ctrl.
122 * @param reg_block The register block requested.
123 * @return The register base address of the requested block.
124 */
127 dt_sram_ctrl_reg_block_t reg_block);
128
129/**
130 * Get the primary register base address of an instance.
131 *
132 * This is just a convenience function, equivalent to
133 * `dt_sram_ctrl_reg_block(dt, kDtSramCtrlRegBlockRegs)`
134 *
135 * @param dt Instance of sram_ctrl.
136 * @return The register base address of the primary register block.
137 */
138static inline uint32_t dt_sram_ctrl_primary_reg_block(
139 dt_sram_ctrl_t dt) {
140 return dt_sram_ctrl_reg_block(dt, kDtSramCtrlRegBlockRegs);
141}
142
143
144/**
145 * Get the alert ID of a sram_ctrl alert for a given instance.
146 *
147 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
148 * instances where the instance is not connected, the return value is unspecified.
149 *
150 * @param dt Instance of sram_ctrl.
151 * @param alert A sram_ctrl alert.
152 * @return The Alert Handler alert ID of the alert of this instance.
153 */
157
158/**
159 * Convert a global alert ID to a local sram_ctrl alert type.
160 *
161 * @param dt Instance of sram_ctrl.
162 * @param alert A global alert ID that belongs to this instance.
163 * @return The sram_ctrl alert, or `kDtSramCtrlAlertCount`.
164 *
165 * **Note:** This function assumes that the global alert ID belongs to the
166 * instance of sram_ctrl passed in parameter. In other words, it must be the case
167 * that `dt_sram_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
168 * this function will return `kDtSramCtrlAlertCount`.
169 */
172 dt_alert_id_t alert);
173
174
175
176/**
177 * Get the clock signal connected to a clock port of an instance.
178 *
179 * @param dt Instance of sram_ctrl.
180 * @param clk Clock port.
181 * @return Clock signal.
182 */
186
187/**
188 * Get the reset signal connected to a reset port of an instance.
189 *
190 * @param dt Instance of sram_ctrl.
191 * @param rst Reset port.
192 * @return Reset signal.
193 */
197
198
199
200#ifdef __cplusplus
201} // extern "C"
202#endif // __cplusplus
203
204#endif // OPENTITAN_DT_SRAM_CTRL_H_